2528ea60f9
The basic idea is that on SusieQ, the difficult part of mapping QPN to context is handled by the mapping registers so the generic QPN allocation doesn't need to worry about chip specifics. For Monty and Linda, there is no mapping table so the qpt->mask (same as dd->qpn_mask), is used to see if the QPN to context falls within [zero..dd->n_krcv_queues). Signed-off-by: Mike Marciniszyn <mike.marciniszyn@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com> |
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| amso1100 | ||
| cxgb3 | ||
| cxgb4 | ||
| ehca | ||
| ipath | ||
| mlx4 | ||
| mthca | ||
| nes | ||
| qib | ||