ea3cc330ac
This is an attempt at cleaning up a bit the way we handle execute permission on powerpc. _PAGE_HWEXEC is gone, _PAGE_EXEC is now only defined by CPUs that can do something with it, and the myriad of #ifdef's in the I$/D$ coherency code is reduced to 2 cases that hopefully should cover everything. The logic on BookE is a little bit different than what it was though not by much. Since now, _PAGE_EXEC will be set by the generic code for executable pages, we need to filter out if they are unclean and recover it. However, I don't expect the code to be more bloated than it already was in that area due to that change. I could boast that this brings proper enforcing of per-page execute permissions to all BookE and 40x but in fact, we've had that now for some time as a side effect of my previous rework in that area (and I didn't even know it :-) We would only enable execute permission if the page was cache clean and we would only cache clean it if we took and exec fault. Since we now enforce that the later only work if VM_EXEC is part of the VMA flags, we de-fact already enforce per-page execute permissions... Unless I missed something Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
49 lines
1.6 KiB
C
49 lines
1.6 KiB
C
#ifndef _ASM_POWERPC_PTE_FSL_BOOKE_H
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#define _ASM_POWERPC_PTE_FSL_BOOKE_H
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#ifdef __KERNEL__
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/* PTE bit definitions for Freescale BookE SW loaded TLB MMU based
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* processors
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*
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MMU Assist Register 3:
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32 33 34 35 36 ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63
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RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR
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- PRESENT *must* be in the bottom three bits because swap cache
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entries use the top 29 bits.
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- FILE *must* be in the bottom three bits because swap cache
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entries use the top 29 bits.
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*/
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/* Definitions for FSL Book-E Cores */
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#define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */
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#define _PAGE_USER 0x00002 /* S: User page (maps to UR) */
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#define _PAGE_FILE 0x00002 /* S: when !present: nonlinear file mapping */
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#define _PAGE_RW 0x00004 /* S: Write permission (SW) */
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#define _PAGE_DIRTY 0x00008 /* S: Page dirty */
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#define _PAGE_EXEC 0x00010 /* H: SX permission */
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#define _PAGE_ACCESSED 0x00020 /* S: Page referenced */
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#define _PAGE_ENDIAN 0x00040 /* H: E bit */
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#define _PAGE_GUARDED 0x00080 /* H: G bit */
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#define _PAGE_COHERENT 0x00100 /* H: M bit */
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#define _PAGE_NO_CACHE 0x00200 /* H: I bit */
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#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
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#define _PAGE_SPECIAL 0x00800 /* S: Special page */
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#ifdef CONFIG_PTE_64BIT
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/* ERPN in a PTE never gets cleared, ignore it */
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#define _PTE_NONE_MASK 0xffffffffffff0000ULL
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/* We extend the size of the PTE flags area when using 64-bit PTEs */
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#define PTE_RPN_SHIFT (PAGE_SHIFT + 8)
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#endif
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#define _PMD_PRESENT 0
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#define _PMD_PRESENT_MASK (PAGE_MASK)
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#define _PMD_BAD (~PAGE_MASK)
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_PTE_FSL_BOOKE_H */
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