1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
117 lines
2.2 KiB
ArmAsm
117 lines
2.2 KiB
ArmAsm
/*
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* linux/arch/arm26/lib/io-readsb.S
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*
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* Copyright (C) 1995-2000 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/hardware.h>
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.insb_align: rsb ip, ip, #4
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cmp ip, r2
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movgt ip, r2
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cmp ip, #2
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ldrb r3, [r0]
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strb r3, [r1], #1
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ldrgeb r3, [r0]
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strgeb r3, [r1], #1
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ldrgtb r3, [r0]
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strgtb r3, [r1], #1
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subs r2, r2, ip
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bne .insb_aligned
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ENTRY(__raw_readsb)
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teq r2, #0 @ do we have to check for the zero len?
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moveq pc, lr
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ands ip, r1, #3
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bne .insb_align
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.insb_aligned: stmfd sp!, {r4 - r6, lr}
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subs r2, r2, #16
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bmi .insb_no_16
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.insb_16_lp: ldrb r3, [r0]
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ldrb r4, [r0]
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orr r3, r3, r4, lsl #8
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ldrb r4, [r0]
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orr r3, r3, r4, lsl #16
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ldrb r4, [r0]
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orr r3, r3, r4, lsl #24
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ldrb r4, [r0]
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ldrb r5, [r0]
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orr r4, r4, r5, lsl #8
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ldrb r5, [r0]
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orr r4, r4, r5, lsl #16
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ldrb r5, [r0]
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orr r4, r4, r5, lsl #24
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ldrb r5, [r0]
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ldrb r6, [r0]
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orr r5, r5, r6, lsl #8
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ldrb r6, [r0]
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orr r5, r5, r6, lsl #16
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ldrb r6, [r0]
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orr r5, r5, r6, lsl #24
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ldrb r6, [r0]
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ldrb ip, [r0]
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orr r6, r6, ip, lsl #8
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ldrb ip, [r0]
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orr r6, r6, ip, lsl #16
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ldrb ip, [r0]
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orr r6, r6, ip, lsl #24
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stmia r1!, {r3 - r6}
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subs r2, r2, #16
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bpl .insb_16_lp
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tst r2, #15
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LOADREGS(eqfd, sp!, {r4 - r6, pc})
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.insb_no_16: tst r2, #8
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beq .insb_no_8
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ldrb r3, [r0]
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ldrb r4, [r0]
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orr r3, r3, r4, lsl #8
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ldrb r4, [r0]
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orr r3, r3, r4, lsl #16
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ldrb r4, [r0]
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orr r3, r3, r4, lsl #24
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ldrb r4, [r0]
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ldrb r5, [r0]
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orr r4, r4, r5, lsl #8
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ldrb r5, [r0]
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orr r4, r4, r5, lsl #16
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ldrb r5, [r0]
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orr r4, r4, r5, lsl #24
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stmia r1!, {r3, r4}
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.insb_no_8: tst r2, #4
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beq .insb_no_4
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ldrb r3, [r0]
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ldrb r4, [r0]
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orr r3, r3, r4, lsl #8
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ldrb r4, [r0]
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orr r3, r3, r4, lsl #16
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ldrb r4, [r0]
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orr r3, r3, r4, lsl #24
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str r3, [r1], #4
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.insb_no_4: ands r2, r2, #3
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LOADREGS(eqfd, sp!, {r4 - r6, pc})
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cmp r2, #2
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ldrb r3, [r0]
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strb r3, [r1], #1
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ldrgeb r3, [r0]
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strgeb r3, [r1], #1
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ldrgtb r3, [r0]
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strgtb r3, [r1]
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LOADREGS(fd, sp!, {r4 - r6, pc})
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