1a442fe02d
This adds basic support for SH-X3 SMP (4 CPUs). More IPI and cache debugging is necessary, mostly interfacing the d-cache coherency and the I-cache broadcast invalidates. Only for testing at present! Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org> |
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.. | ||
irq | ||
sh2 | ||
sh2a | ||
sh3 | ||
sh4 | ||
sh4a | ||
adc.c | ||
clock.c | ||
init.c | ||
Makefile | ||
ubc.S |