173d668138
The Xtensa port contained many header files that were never needed. This rather lengthy patch removes all those files. Unfortunately, there were many dependencies that needed to be updated, so this patch touches quite a few source files. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
455 lines
12 KiB
C
455 lines
12 KiB
C
/*
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* arch/xtensa/kernel/process.c
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*
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* Xtensa Processor version.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*
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* Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
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* Chris Zankel <chris@zankel.net>
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* Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
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* Kevin Chea
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/smp_lock.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/elf.h>
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#include <linux/init.h>
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#include <linux/prctl.h>
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#include <linux/init_task.h>
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#include <linux/module.h>
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#include <linux/mqueue.h>
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#include <asm/pgtable.h>
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#include <asm/uaccess.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/platform.h>
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#include <asm/mmu.h>
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#include <asm/irq.h>
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#include <asm/atomic.h>
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#include <asm/asm-offsets.h>
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#include <asm/regs.h>
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extern void ret_from_fork(void);
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static struct fs_struct init_fs = INIT_FS;
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static struct files_struct init_files = INIT_FILES;
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static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
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static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
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struct mm_struct init_mm = INIT_MM(init_mm);
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EXPORT_SYMBOL(init_mm);
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union thread_union init_thread_union
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__attribute__((__section__(".data.init_task"))) =
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{ INIT_THREAD_INFO(init_task) };
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struct task_struct init_task = INIT_TASK(init_task);
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EXPORT_SYMBOL(init_task);
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struct task_struct *current_set[NR_CPUS] = {&init_task, };
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void (*pm_power_off)(void) = NULL;
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EXPORT_SYMBOL(pm_power_off);
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/*
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* Powermanagement idle function, if any is provided by the platform.
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*/
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void cpu_idle(void)
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{
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local_irq_enable();
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/* endless idle loop with no priority at all */
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while (1) {
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while (!need_resched())
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platform_idle();
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preempt_enable_no_resched();
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schedule();
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preempt_disable();
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}
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}
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/*
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* Free current thread data structures etc..
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*/
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void exit_thread(void)
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{
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}
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void flush_thread(void)
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{
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}
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/*
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* Copy thread.
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*
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* The stack layout for the new thread looks like this:
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*
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* +------------------------+ <- sp in childregs (= tos)
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* | childregs |
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* +------------------------+ <- thread.sp = sp in dummy-frame
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* | dummy-frame | (saved in dummy-frame spill-area)
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* +------------------------+
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*
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* We create a dummy frame to return to ret_from_fork:
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* a0 points to ret_from_fork (simulating a call4)
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* sp points to itself (thread.sp)
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* a2, a3 are unused.
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*
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* Note: This is a pristine frame, so we don't need any spill region on top of
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* childregs.
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*/
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int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
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unsigned long unused,
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struct task_struct * p, struct pt_regs * regs)
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{
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struct pt_regs *childregs;
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unsigned long tos;
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int user_mode = user_mode(regs);
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/* Set up new TSS. */
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tos = (unsigned long)task_stack_page(p) + THREAD_SIZE;
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if (user_mode)
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childregs = (struct pt_regs*)(tos - PT_USER_SIZE);
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else
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childregs = (struct pt_regs*)tos - 1;
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*childregs = *regs;
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/* Create a call4 dummy-frame: a0 = 0, a1 = childregs. */
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*((int*)childregs - 3) = (unsigned long)childregs;
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*((int*)childregs - 4) = 0;
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childregs->areg[1] = tos;
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childregs->areg[2] = 0;
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p->set_child_tid = p->clear_child_tid = NULL;
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p->thread.ra = MAKE_RA_FOR_CALL((unsigned long)ret_from_fork, 0x1);
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p->thread.sp = (unsigned long)childregs;
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if (user_mode(regs)) {
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int len = childregs->wmask & ~0xf;
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childregs->areg[1] = usp;
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memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4],
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®s->areg[XCHAL_NUM_AREGS - len/4], len);
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if (clone_flags & CLONE_SETTLS)
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childregs->areg[2] = childregs->areg[6];
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} else {
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/* In kernel space, we start a new thread with a new stack. */
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childregs->wmask = 1;
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}
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return 0;
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}
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/*
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* Create a kernel thread
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*/
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int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
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{
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long retval;
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__asm__ __volatile__
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("mov a5, %4\n\t" /* preserve fn in a5 */
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"mov a6, %3\n\t" /* preserve and setup arg in a6 */
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"movi a2, %1\n\t" /* load __NR_clone for syscall*/
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"mov a3, sp\n\t" /* sp check and sys_clone */
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"mov a4, %5\n\t" /* load flags for syscall */
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"syscall\n\t"
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"beq a3, sp, 1f\n\t" /* branch if parent */
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"callx4 a5\n\t" /* call fn */
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"movi a2, %2\n\t" /* load __NR_exit for syscall */
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"mov a3, a6\n\t" /* load fn return value */
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"syscall\n"
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"1:\n\t"
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"mov %0, a2\n\t" /* parent returns zero */
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:"=r" (retval)
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:"i" (__NR_clone), "i" (__NR_exit),
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"r" (arg), "r" (fn),
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"r" (flags | CLONE_VM)
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: "a2", "a3", "a4", "a5", "a6" );
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return retval;
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}
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/*
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* These bracket the sleeping functions..
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*/
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unsigned long get_wchan(struct task_struct *p)
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{
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unsigned long sp, pc;
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unsigned long stack_page = (unsigned long) task_stack_page(p);
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int count = 0;
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if (!p || p == current || p->state == TASK_RUNNING)
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return 0;
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sp = p->thread.sp;
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pc = MAKE_PC_FROM_RA(p->thread.ra, p->thread.sp);
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do {
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if (sp < stack_page + sizeof(struct task_struct) ||
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sp >= (stack_page + THREAD_SIZE) ||
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pc == 0)
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return 0;
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if (!in_sched_functions(pc))
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return pc;
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/* Stack layout: sp-4: ra, sp-3: sp' */
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pc = MAKE_PC_FROM_RA(*(unsigned long*)sp - 4, sp);
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sp = *(unsigned long *)sp - 3;
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} while (count++ < 16);
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return 0;
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}
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/*
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* do_copy_regs() gathers information from 'struct pt_regs' and
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* 'current->thread.areg[]' to fill in the xtensa_gregset_t
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* structure.
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*
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* xtensa_gregset_t and 'struct pt_regs' are vastly different formats
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* of processor registers. Besides different ordering,
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* xtensa_gregset_t contains non-live register information that
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* 'struct pt_regs' does not. Exception handling (primarily) uses
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* 'struct pt_regs'. Core files and ptrace use xtensa_gregset_t.
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*
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*/
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void do_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs,
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struct task_struct *tsk)
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{
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int i, n, wb_offset;
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elfregs->xchal_config_id0 = XCHAL_HW_CONFIGID0;
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elfregs->xchal_config_id1 = XCHAL_HW_CONFIGID1;
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__asm__ __volatile__ ("rsr %0, 176\n" : "=a" (i));
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elfregs->cpux = i;
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__asm__ __volatile__ ("rsr %0, 208\n" : "=a" (i));
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elfregs->cpuy = i;
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/* Note: PS.EXCM is not set while user task is running; its
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* being set in regs->ps is for exception handling convenience.
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*/
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elfregs->pc = regs->pc;
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elfregs->ps = (regs->ps & ~(1 << PS_EXCM_BIT));
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elfregs->exccause = regs->exccause;
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elfregs->excvaddr = regs->excvaddr;
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elfregs->windowbase = regs->windowbase;
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elfregs->windowstart = regs->windowstart;
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elfregs->lbeg = regs->lbeg;
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elfregs->lend = regs->lend;
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elfregs->lcount = regs->lcount;
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elfregs->sar = regs->sar;
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elfregs->syscall = regs->syscall;
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/* Copy register file.
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* The layout looks like this:
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*
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* | a0 ... a15 | Z ... Z | arX ... arY |
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* current window unused saved frames
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*/
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memset (elfregs->ar, 0, sizeof(elfregs->ar));
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wb_offset = regs->windowbase * 4;
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n = (regs->wmask&1)? 4 : (regs->wmask&2)? 8 : (regs->wmask&4)? 12 : 16;
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for (i = 0; i < n; i++)
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elfregs->ar[(wb_offset + i) % XCHAL_NUM_AREGS] = regs->areg[i];
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n = (regs->wmask >> 4) * 4;
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for (i = XCHAL_NUM_AREGS - n; n > 0; i++, n--)
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elfregs->ar[(wb_offset + i) % XCHAL_NUM_AREGS] = regs->areg[i];
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}
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void xtensa_elf_core_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs)
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{
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do_copy_regs ((xtensa_gregset_t *)elfregs, regs, current);
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}
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/* The inverse of do_copy_regs(). No error or sanity checking. */
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void do_restore_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs,
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struct task_struct *tsk)
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{
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int i, n, wb_offset;
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/* Note: PS.EXCM is not set while user task is running; it
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* needs to be set in regs->ps is for exception handling convenience.
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*/
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regs->pc = elfregs->pc;
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regs->ps = (elfregs->ps | (1 << PS_EXCM_BIT));
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regs->exccause = elfregs->exccause;
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regs->excvaddr = elfregs->excvaddr;
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regs->windowbase = elfregs->windowbase;
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regs->windowstart = elfregs->windowstart;
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regs->lbeg = elfregs->lbeg;
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regs->lend = elfregs->lend;
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regs->lcount = elfregs->lcount;
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regs->sar = elfregs->sar;
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regs->syscall = elfregs->syscall;
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/* Clear everything. */
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memset (regs->areg, 0, sizeof(regs->areg));
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/* Copy regs from live window frame. */
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wb_offset = regs->windowbase * 4;
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n = (regs->wmask&1)? 4 : (regs->wmask&2)? 8 : (regs->wmask&4)? 12 : 16;
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for (i = 0; i < n; i++)
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regs->areg[(wb_offset+i) % XCHAL_NUM_AREGS] = elfregs->ar[i];
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n = (regs->wmask >> 4) * 4;
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for (i = XCHAL_NUM_AREGS - n; n > 0; i++, n--)
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regs->areg[(wb_offset+i) % XCHAL_NUM_AREGS] = elfregs->ar[i];
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}
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/*
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* do_save_fpregs() gathers information from 'struct pt_regs' and
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* 'current->thread' to fill in the elf_fpregset_t structure.
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*
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* Core files and ptrace use elf_fpregset_t.
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*/
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void do_save_fpregs (elf_fpregset_t *fpregs, struct pt_regs *regs,
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struct task_struct *tsk)
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{
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#if XCHAL_HAVE_CP
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extern unsigned char _xtensa_reginfo_tables[];
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extern unsigned _xtensa_reginfo_table_size;
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int i;
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unsigned long flags;
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/* Before dumping coprocessor state from memory,
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* ensure any live coprocessor contents for this
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* task are first saved to memory:
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*/
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local_irq_save(flags);
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for (i = 0; i < XCHAL_CP_MAX; i++) {
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if (tsk == coprocessor_info[i].owner) {
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enable_coprocessor(i);
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save_coprocessor_registers(
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tsk->thread.cp_save+coprocessor_info[i].offset,i);
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disable_coprocessor(i);
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}
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}
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local_irq_restore(flags);
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/* Now dump coprocessor & extra state: */
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memcpy((unsigned char*)fpregs,
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_xtensa_reginfo_tables, _xtensa_reginfo_table_size);
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memcpy((unsigned char*)fpregs + _xtensa_reginfo_table_size,
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tsk->thread.cp_save, XTENSA_CP_EXTRA_SIZE);
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#endif
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}
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/*
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* The inverse of do_save_fpregs().
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* Copies coprocessor and extra state from fpregs into regs and tsk->thread.
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* Returns 0 on success, non-zero if layout doesn't match.
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*/
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int do_restore_fpregs (elf_fpregset_t *fpregs, struct pt_regs *regs,
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struct task_struct *tsk)
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{
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#if XCHAL_HAVE_CP
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extern unsigned char _xtensa_reginfo_tables[];
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extern unsigned _xtensa_reginfo_table_size;
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int i;
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unsigned long flags;
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/* Make sure save area layouts match.
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* FIXME: in the future we could allow restoring from
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* a different layout of the same registers, by comparing
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* fpregs' table with _xtensa_reginfo_tables and matching
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* entries and copying registers one at a time.
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* Not too sure yet whether that's very useful.
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*/
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if( memcmp((unsigned char*)fpregs,
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_xtensa_reginfo_tables, _xtensa_reginfo_table_size) ) {
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return -1;
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}
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/* Before restoring coprocessor state from memory,
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* ensure any live coprocessor contents for this
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* task are first invalidated.
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*/
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local_irq_save(flags);
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for (i = 0; i < XCHAL_CP_MAX; i++) {
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if (tsk == coprocessor_info[i].owner) {
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enable_coprocessor(i);
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save_coprocessor_registers(
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tsk->thread.cp_save+coprocessor_info[i].offset,i);
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coprocessor_info[i].owner = 0;
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disable_coprocessor(i);
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}
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}
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local_irq_restore(flags);
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/* Now restore coprocessor & extra state: */
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memcpy(tsk->thread.cp_save,
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(unsigned char*)fpregs + _xtensa_reginfo_table_size,
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XTENSA_CP_EXTRA_SIZE);
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#endif
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return 0;
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}
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/*
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* Fill in the CP structure for a core dump for a particular task.
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*/
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int
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dump_task_fpu(struct pt_regs *regs, struct task_struct *task, elf_fpregset_t *r)
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{
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return 0; /* no coprocessors active on this processor */
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}
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/*
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* Fill in the CP structure for a core dump.
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* This includes any FPU coprocessor.
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* Here, we dump all coprocessors, and other ("extra") custom state.
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*
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* This function is called by elf_core_dump() in fs/binfmt_elf.c
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* (in which case 'regs' comes from calls to do_coredump, see signals.c).
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*/
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int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
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{
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return dump_task_fpu(regs, current, r);
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}
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