ecb93d1ccd
Impact: Optimization One of the problems with inserting a pile of C calls where previously there were none is that the register pressure is greatly increased. The C calling convention says that the caller must expect a certain set of registers may be trashed by the callee, and that the callee can use those registers without restriction. This includes the function argument registers, and several others. This patch seeks to alleviate this pressure by introducing wrapper thunks that will do the register saving/restoring, so that the callsite doesn't need to worry about it, but the callee function can be conventional compiler-generated code. In many cases (particularly performance-sensitive cases) the callee will be in assembler anyway, and need not use the compiler's calling convention. Standard calling convention is: arguments return scratch x86-32 eax edx ecx eax ? x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11 The thunk preserves all argument and scratch registers. The return register is not preserved, and is available as a scratch register for unwrapped callee code (and of course the return value). Wrapped function pointers are themselves wrapped in a struct paravirt_callee_save structure, in order to get some warning from the compiler when functions with mismatched calling conventions are used. The most common paravirt ops, both statically and dynamically, are interrupt enable/disable/save/restore, so handle them first. This is particularly easy since their calls are handled specially anyway. XXX Deal with VMI. What's their calling convention? Signed-off-by: H. Peter Anvin <hpa@zytor.com>
161 lines
3.7 KiB
C
161 lines
3.7 KiB
C
/*
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* vSMPowered(tm) systems specific initialization
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* Copyright (C) 2005 ScaleMP Inc.
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*
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* Use of this code is subject to the terms and conditions of the
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* GNU general public license version 2. See "COPYING" or
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* http://www.gnu.org/licenses/gpl.html
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*
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* Ravikiran Thirumalai <kiran@scalemp.com>,
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* Shai Fultheim <shai@scalemp.com>
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* Paravirt ops integration: Glauber de Oliveira Costa <gcosta@redhat.com>,
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* Ravikiran Thirumalai <kiran@scalemp.com>
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*/
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#include <linux/init.h>
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#include <linux/pci_ids.h>
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#include <linux/pci_regs.h>
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#include <asm/apic.h>
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#include <asm/pci-direct.h>
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#include <asm/io.h>
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#include <asm/paravirt.h>
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#include <asm/setup.h>
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#if defined CONFIG_PCI && defined CONFIG_PARAVIRT
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/*
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* Interrupt control on vSMPowered systems:
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* ~AC is a shadow of IF. If IF is 'on' AC should be 'off'
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* and vice versa.
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*/
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static unsigned long vsmp_save_fl(void)
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{
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unsigned long flags = native_save_fl();
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if (!(flags & X86_EFLAGS_IF) || (flags & X86_EFLAGS_AC))
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flags &= ~X86_EFLAGS_IF;
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return flags;
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}
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PV_CALLEE_SAVE_REGS_THUNK(vsmp_save_fl);
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static void vsmp_restore_fl(unsigned long flags)
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{
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if (flags & X86_EFLAGS_IF)
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flags &= ~X86_EFLAGS_AC;
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else
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flags |= X86_EFLAGS_AC;
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native_restore_fl(flags);
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}
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PV_CALLEE_SAVE_REGS_THUNK(vsmp_restore_fl);
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static void vsmp_irq_disable(void)
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{
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unsigned long flags = native_save_fl();
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native_restore_fl((flags & ~X86_EFLAGS_IF) | X86_EFLAGS_AC);
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}
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PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_disable);
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static void vsmp_irq_enable(void)
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{
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unsigned long flags = native_save_fl();
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native_restore_fl((flags | X86_EFLAGS_IF) & (~X86_EFLAGS_AC));
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}
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PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_enable);
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static unsigned __init_or_module vsmp_patch(u8 type, u16 clobbers, void *ibuf,
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unsigned long addr, unsigned len)
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{
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switch (type) {
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case PARAVIRT_PATCH(pv_irq_ops.irq_enable):
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case PARAVIRT_PATCH(pv_irq_ops.irq_disable):
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case PARAVIRT_PATCH(pv_irq_ops.save_fl):
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case PARAVIRT_PATCH(pv_irq_ops.restore_fl):
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return paravirt_patch_default(type, clobbers, ibuf, addr, len);
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default:
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return native_patch(type, clobbers, ibuf, addr, len);
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}
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}
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static void __init set_vsmp_pv_ops(void)
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{
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void __iomem *address;
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unsigned int cap, ctl, cfg;
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/* set vSMP magic bits to indicate vSMP capable kernel */
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cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);
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address = early_ioremap(cfg, 8);
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cap = readl(address);
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ctl = readl(address + 4);
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printk(KERN_INFO "vSMP CTL: capabilities:0x%08x control:0x%08x\n",
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cap, ctl);
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if (cap & ctl & (1 << 4)) {
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/* Setup irq ops and turn on vSMP IRQ fastpath handling */
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pv_irq_ops.irq_disable = PV_CALLEE_SAVE(vsmp_irq_disable);
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pv_irq_ops.irq_enable = PV_CALLEE_SAVE(vsmp_irq_enable);
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pv_irq_ops.save_fl = PV_CALLEE_SAVE(vsmp_save_fl);
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pv_irq_ops.restore_fl = PV_CALLEE_SAVE(vsmp_restore_fl);
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pv_init_ops.patch = vsmp_patch;
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ctl &= ~(1 << 4);
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writel(ctl, address + 4);
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ctl = readl(address + 4);
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printk(KERN_INFO "vSMP CTL: control set to:0x%08x\n", ctl);
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}
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early_iounmap(address, 8);
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}
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#else
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static void __init set_vsmp_pv_ops(void)
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{
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}
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#endif
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#ifdef CONFIG_PCI
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static int is_vsmp = -1;
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static void __init detect_vsmp_box(void)
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{
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is_vsmp = 0;
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if (!early_pci_allowed())
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return;
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/* Check if we are running on a ScaleMP vSMPowered box */
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if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) ==
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(PCI_VENDOR_ID_SCALEMP | (PCI_DEVICE_ID_SCALEMP_VSMP_CTL << 16)))
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is_vsmp = 1;
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}
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int is_vsmp_box(void)
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{
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if (is_vsmp != -1)
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return is_vsmp;
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else {
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WARN_ON_ONCE(1);
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return 0;
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}
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}
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#else
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static void __init detect_vsmp_box(void)
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{
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}
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int is_vsmp_box(void)
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{
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return 0;
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}
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#endif
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void __init vsmp_init(void)
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{
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detect_vsmp_box();
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if (!is_vsmp_box())
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return;
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set_vsmp_pv_ops();
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return;
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}
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