0637a70a5d
Some buggy systems can machine check when config space accesses happen for some non existent devices. i386/x86-64 do some early device scans that might trigger this. Allow pci=noearly to disable this. Also when type 1 is disabling also don't do any early accesses which are always type1. This moves the pci= configuration parsing to be a early parameter. I don't think this can break anything because it only changes a single global that is only used by PCI. Cc: gregkh@suse.de Cc: Trammell Hudson <hudson@osresearch.net> Signed-off-by: Andi Kleen <ak@suse.de>
91 lines
2.4 KiB
C
91 lines
2.4 KiB
C
/*
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* Low-Level PCI Access for i386 machines.
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*
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* (c) 1999 Martin Mares <mj@ucw.cz>
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*/
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(x...) printk(x)
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#else
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#define DBG(x...)
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#endif
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#define PCI_PROBE_BIOS 0x0001
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#define PCI_PROBE_CONF1 0x0002
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#define PCI_PROBE_CONF2 0x0004
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#define PCI_PROBE_MMCONF 0x0008
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#define PCI_PROBE_MASK 0x000f
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#define PCI_PROBE_NOEARLY 0x0010
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#define PCI_NO_SORT 0x0100
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#define PCI_BIOS_SORT 0x0200
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#define PCI_NO_CHECKS 0x0400
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#define PCI_USE_PIRQ_MASK 0x0800
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#define PCI_ASSIGN_ROMS 0x1000
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#define PCI_BIOS_IRQ_SCAN 0x2000
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#define PCI_ASSIGN_ALL_BUSSES 0x4000
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extern unsigned int pci_probe;
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extern unsigned long pirq_table_addr;
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/* pci-i386.c */
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extern unsigned int pcibios_max_latency;
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void pcibios_resource_survey(void);
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int pcibios_enable_resources(struct pci_dev *, int);
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void pcibios_disable_resources(struct pci_dev *);
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/* pci-pc.c */
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extern int pcibios_last_bus;
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extern struct pci_bus *pci_root_bus;
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extern struct pci_ops pci_root_ops;
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/* pci-irq.c */
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struct irq_info {
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u8 bus, devfn; /* Bus, device and function */
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struct {
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u8 link; /* IRQ line ID, chipset dependent, 0=not routed */
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u16 bitmap; /* Available IRQs */
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} __attribute__((packed)) irq[4];
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u8 slot; /* Slot number, 0=onboard */
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u8 rfu;
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} __attribute__((packed));
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struct irq_routing_table {
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u32 signature; /* PIRQ_SIGNATURE should be here */
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u16 version; /* PIRQ_VERSION */
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u16 size; /* Table size in bytes */
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u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */
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u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
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u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
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u32 miniport_data; /* Crap */
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u8 rfu[11];
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u8 checksum; /* Modulo 256 checksum must give zero */
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struct irq_info slots[0];
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} __attribute__((packed));
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extern unsigned int pcibios_irq_mask;
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extern int pcibios_scanned;
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extern spinlock_t pci_config_lock;
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extern int (*pcibios_enable_irq)(struct pci_dev *dev);
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extern void (*pcibios_disable_irq)(struct pci_dev *dev);
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extern int pci_conf1_write(unsigned int seg, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 value);
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extern int pci_conf1_read(unsigned int seg, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 *value);
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extern int pci_direct_probe(void);
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extern void pci_direct_init(int type);
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extern void pci_pcbios_init(void);
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extern void pci_mmcfg_init(int type);
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extern void pcibios_sort(void);
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