fecb494bee
Fix sparse & checkpatch warnings in OMAP2/3 PRCM & PM code. This mostly consists of: - converting pointer comparisons to integers in form similar to (ptr == 0) to the standard idiom (!ptr) - labeling a few non-static private functions as static - adding prototypes for *_init() functions in the appropriate header files, and getting rid of the corresponding open-coded extern prototypes in other C files - renaming the variable 'sclk' in mach-omap2/clock.c:omap2_get_apll_clkin to avoid shadowing an earlier declaration Clean up checkpatch issues. This mostly involves: - converting some asm/ includes to linux/ includes - cleaning up some whitespace - getting rid of braces for conditionals with single following statements Also take care of a few odds and ends, including: - getting rid of unlikely() and likely() - none of this code is particularly fast-path code, so the performance impact seems slim; and some of those likely() and unlikely() indicators are probably not as accurate as the ARM's branch predictor - removing some superfluous casts linux-omap source commit is 347df59f5d20fdf905afbc26b1328b0e28a8a01b. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
80 lines
2.7 KiB
C
80 lines
2.7 KiB
C
/*
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* linux/arch/arm/mach-omap2/clock.h
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*
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* Copyright (C) 2005-2008 Texas Instruments, Inc.
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* Copyright (C) 2004-2008 Nokia Corporation
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*
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* Contacts:
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* Richard Woodruff <r-woodruff2@ti.com>
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_H
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#define __ARCH_ARM_MACH_OMAP2_CLOCK_H
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#include <mach/clock.h>
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/* The maximum error between a target DPLL rate and the rounded rate in Hz */
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#define DEFAULT_DPLL_RATE_TOLERANCE 50000
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int omap2_clk_init(void);
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int omap2_clk_enable(struct clk *clk);
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void omap2_clk_disable(struct clk *clk);
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long omap2_clk_round_rate(struct clk *clk, unsigned long rate);
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int omap2_clk_set_rate(struct clk *clk, unsigned long rate);
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int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent);
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int omap2_dpll_set_rate_tolerance(struct clk *clk, unsigned int tolerance);
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long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate);
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#ifdef CONFIG_OMAP_RESET_CLOCKS
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void omap2_clk_disable_unused(struct clk *clk);
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#else
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#define omap2_clk_disable_unused NULL
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#endif
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void omap2_clksel_recalc(struct clk *clk);
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void omap2_init_clk_clkdm(struct clk *clk);
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void omap2_init_clksel_parent(struct clk *clk);
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u32 omap2_clksel_get_divisor(struct clk *clk);
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u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
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u32 *new_div);
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u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val);
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u32 omap2_divisor_to_clksel(struct clk *clk, u32 div);
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void omap2_fixed_divisor_recalc(struct clk *clk);
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long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate);
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int omap2_clksel_set_rate(struct clk *clk, unsigned long rate);
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u32 omap2_get_dpll_rate(struct clk *clk);
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int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name);
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void omap2_clk_prepare_for_reboot(void);
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extern const struct clkops clkops_omap2_dflt_wait;
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extern const struct clkops clkops_omap2_dflt;
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extern u8 cpu_mask;
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/* clksel_rate data common to 24xx/343x */
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static const struct clksel_rate gpt_32k_rates[] = {
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{ .div = 1, .val = 0, .flags = RATE_IN_24XX | RATE_IN_343X | DEFAULT_RATE },
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{ .div = 0 }
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};
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static const struct clksel_rate gpt_sys_rates[] = {
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{ .div = 1, .val = 1, .flags = RATE_IN_24XX | RATE_IN_343X | DEFAULT_RATE },
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{ .div = 0 }
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};
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static const struct clksel_rate gfx_l3_rates[] = {
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{ .div = 1, .val = 1, .flags = RATE_IN_24XX | RATE_IN_343X },
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{ .div = 2, .val = 2, .flags = RATE_IN_24XX | RATE_IN_343X | DEFAULT_RATE },
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{ .div = 3, .val = 3, .flags = RATE_IN_243X | RATE_IN_343X },
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{ .div = 4, .val = 4, .flags = RATE_IN_243X | RATE_IN_343X },
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{ .div = 0 }
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};
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#endif
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