991528d734
Intel processors starting with the Core Duo support support processor native C-state using the MWAIT instruction. Refer: Intel Architecture Software Developer's Manual http://www.intel.com/design/Pentium4/manuals/253668.htm Platform firmware exports the support for Native C-state to OS using ACPI _PDC and _CST methods. Refer: Intel Processor Vendor-Specific ACPI: Interface Specification http://www.intel.com/technology/iapc/acpi/downloads/302223.htm With Processor Native C-state, we use 'MWAIT' instruction on the processor to enter different C-states (C1, C2, C3). We won't use the special IO ports to enter C-state and no SMM mode etc required to enter C-state. Overall this will mean better C-state support. One major advantage of using MWAIT for all C-states is, with this and "treat interrupt as break event" feature of MWAIT, we can now get accurate timing for the time spent in C1, C2, .. states. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Len Brown <len.brown@intel.com>
880 lines
21 KiB
C
880 lines
21 KiB
C
/*
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* linux/arch/x86-64/kernel/process.c
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*
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* Copyright (C) 1995 Linus Torvalds
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*
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* Pentium III FXSR, SSE support
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* Gareth Hughes <gareth@valinux.com>, May 2000
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*
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* X86-64 port
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* Andi Kleen.
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*
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* CPU hotplug support - ashok.raj@intel.com
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*/
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/*
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* This file handles the architecture-dependent parts of process handling..
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*/
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#include <stdarg.h>
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#include <linux/cpu.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/elfcore.h>
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#include <linux/smp.h>
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#include <linux/slab.h>
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#include <linux/user.h>
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#include <linux/module.h>
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#include <linux/a.out.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/ptrace.h>
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#include <linux/utsname.h>
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#include <linux/random.h>
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#include <linux/notifier.h>
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#include <linux/kprobes.h>
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#include <asm/uaccess.h>
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#include <asm/pgtable.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/i387.h>
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#include <asm/mmu_context.h>
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#include <asm/pda.h>
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#include <asm/prctl.h>
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#include <asm/kdebug.h>
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#include <asm/desc.h>
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#include <asm/proto.h>
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#include <asm/ia32.h>
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#include <asm/idle.h>
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asmlinkage extern void ret_from_fork(void);
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unsigned long kernel_thread_flags = CLONE_VM | CLONE_UNTRACED;
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unsigned long boot_option_idle_override = 0;
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EXPORT_SYMBOL(boot_option_idle_override);
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/*
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* Powermanagement idle function, if any..
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*/
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void (*pm_idle)(void);
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EXPORT_SYMBOL(pm_idle);
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static DEFINE_PER_CPU(unsigned int, cpu_idle_state);
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static ATOMIC_NOTIFIER_HEAD(idle_notifier);
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void idle_notifier_register(struct notifier_block *n)
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{
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atomic_notifier_chain_register(&idle_notifier, n);
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}
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EXPORT_SYMBOL_GPL(idle_notifier_register);
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void idle_notifier_unregister(struct notifier_block *n)
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{
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atomic_notifier_chain_unregister(&idle_notifier, n);
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}
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EXPORT_SYMBOL(idle_notifier_unregister);
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void enter_idle(void)
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{
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write_pda(isidle, 1);
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atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL);
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}
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static void __exit_idle(void)
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{
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if (read_pda(isidle) == 0)
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return;
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write_pda(isidle, 0);
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atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL);
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}
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/* Called from interrupts to signify idle end */
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void exit_idle(void)
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{
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/* idle loop has pid 0 */
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if (current->pid)
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return;
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__exit_idle();
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}
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/*
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* We use this if we don't have any better
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* idle routine..
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*/
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static void default_idle(void)
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{
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local_irq_enable();
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current_thread_info()->status &= ~TS_POLLING;
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smp_mb__after_clear_bit();
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while (!need_resched()) {
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local_irq_disable();
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if (!need_resched())
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safe_halt();
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else
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local_irq_enable();
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}
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current_thread_info()->status |= TS_POLLING;
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}
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/*
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* On SMP it's slightly faster (but much more power-consuming!)
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* to poll the ->need_resched flag instead of waiting for the
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* cross-CPU IPI to arrive. Use this option with caution.
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*/
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static void poll_idle (void)
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{
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local_irq_enable();
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asm volatile(
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"2:"
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"testl %0,%1;"
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"rep; nop;"
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"je 2b;"
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: :
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"i" (_TIF_NEED_RESCHED),
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"m" (current_thread_info()->flags));
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}
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void cpu_idle_wait(void)
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{
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unsigned int cpu, this_cpu = get_cpu();
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cpumask_t map;
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set_cpus_allowed(current, cpumask_of_cpu(this_cpu));
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put_cpu();
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cpus_clear(map);
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for_each_online_cpu(cpu) {
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per_cpu(cpu_idle_state, cpu) = 1;
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cpu_set(cpu, map);
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}
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__get_cpu_var(cpu_idle_state) = 0;
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wmb();
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do {
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ssleep(1);
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for_each_online_cpu(cpu) {
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if (cpu_isset(cpu, map) &&
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!per_cpu(cpu_idle_state, cpu))
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cpu_clear(cpu, map);
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}
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cpus_and(map, map, cpu_online_map);
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} while (!cpus_empty(map));
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}
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EXPORT_SYMBOL_GPL(cpu_idle_wait);
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#ifdef CONFIG_HOTPLUG_CPU
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DECLARE_PER_CPU(int, cpu_state);
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#include <asm/nmi.h>
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/* We halt the CPU with physical CPU hotplug */
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static inline void play_dead(void)
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{
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idle_task_exit();
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wbinvd();
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mb();
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/* Ack it */
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__get_cpu_var(cpu_state) = CPU_DEAD;
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local_irq_disable();
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while (1)
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halt();
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}
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#else
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static inline void play_dead(void)
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{
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BUG();
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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/*
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* The idle thread. There's no useful work to be
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* done, so just try to conserve power and have a
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* low exit latency (ie sit in a loop waiting for
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* somebody to say that they'd like to reschedule)
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*/
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void cpu_idle (void)
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{
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current_thread_info()->status |= TS_POLLING;
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/* endless idle loop with no priority at all */
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while (1) {
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while (!need_resched()) {
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void (*idle)(void);
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if (__get_cpu_var(cpu_idle_state))
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__get_cpu_var(cpu_idle_state) = 0;
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rmb();
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idle = pm_idle;
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if (!idle)
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idle = default_idle;
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if (cpu_is_offline(smp_processor_id()))
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play_dead();
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enter_idle();
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idle();
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/* In many cases the interrupt that ended idle
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has already called exit_idle. But some idle
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loops can be woken up without interrupt. */
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__exit_idle();
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}
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preempt_enable_no_resched();
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schedule();
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preempt_disable();
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}
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}
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/*
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* This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
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* which can obviate IPI to trigger checking of need_resched.
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* We execute MONITOR against need_resched and enter optimized wait state
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* through MWAIT. Whenever someone changes need_resched, we would be woken
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* up from MWAIT (without an IPI).
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*
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* New with Core Duo processors, MWAIT can take some hints based on CPU
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* capability.
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*/
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void mwait_idle_with_hints(unsigned long eax, unsigned long ecx)
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{
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if (!need_resched()) {
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__monitor((void *)¤t_thread_info()->flags, 0, 0);
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smp_mb();
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if (!need_resched())
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__mwait(eax, ecx);
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}
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}
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/* Default MONITOR/MWAIT with no hints, used for default C1 state */
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static void mwait_idle(void)
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{
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local_irq_enable();
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while (!need_resched())
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mwait_idle_with_hints(0,0);
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}
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void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
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{
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static int printed;
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if (cpu_has(c, X86_FEATURE_MWAIT)) {
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/*
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* Skip, if setup has overridden idle.
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* One CPU supports mwait => All CPUs supports mwait
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*/
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if (!pm_idle) {
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if (!printed) {
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printk("using mwait in idle threads.\n");
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printed = 1;
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}
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pm_idle = mwait_idle;
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}
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}
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}
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static int __init idle_setup (char *str)
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{
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if (!strncmp(str, "poll", 4)) {
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printk("using polling idle threads.\n");
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pm_idle = poll_idle;
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}
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boot_option_idle_override = 1;
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return 1;
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}
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__setup("idle=", idle_setup);
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/* Prints also some state that isn't saved in the pt_regs */
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void __show_regs(struct pt_regs * regs)
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{
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unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs;
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unsigned int fsindex,gsindex;
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unsigned int ds,cs,es;
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printk("\n");
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print_modules();
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printk("Pid: %d, comm: %.20s %s %s %.*s\n",
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current->pid, current->comm, print_tainted(),
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init_utsname()->release,
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(int)strcspn(init_utsname()->version, " "),
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init_utsname()->version);
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printk("RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->rip);
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printk_address(regs->rip);
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printk("RSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss, regs->rsp,
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regs->eflags);
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printk("RAX: %016lx RBX: %016lx RCX: %016lx\n",
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regs->rax, regs->rbx, regs->rcx);
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printk("RDX: %016lx RSI: %016lx RDI: %016lx\n",
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regs->rdx, regs->rsi, regs->rdi);
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printk("RBP: %016lx R08: %016lx R09: %016lx\n",
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regs->rbp, regs->r8, regs->r9);
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printk("R10: %016lx R11: %016lx R12: %016lx\n",
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regs->r10, regs->r11, regs->r12);
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printk("R13: %016lx R14: %016lx R15: %016lx\n",
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regs->r13, regs->r14, regs->r15);
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asm("movl %%ds,%0" : "=r" (ds));
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asm("movl %%cs,%0" : "=r" (cs));
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asm("movl %%es,%0" : "=r" (es));
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asm("movl %%fs,%0" : "=r" (fsindex));
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asm("movl %%gs,%0" : "=r" (gsindex));
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rdmsrl(MSR_FS_BASE, fs);
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rdmsrl(MSR_GS_BASE, gs);
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rdmsrl(MSR_KERNEL_GS_BASE, shadowgs);
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asm("movq %%cr0, %0": "=r" (cr0));
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asm("movq %%cr2, %0": "=r" (cr2));
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asm("movq %%cr3, %0": "=r" (cr3));
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asm("movq %%cr4, %0": "=r" (cr4));
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printk("FS: %016lx(%04x) GS:%016lx(%04x) knlGS:%016lx\n",
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fs,fsindex,gs,gsindex,shadowgs);
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printk("CS: %04x DS: %04x ES: %04x CR0: %016lx\n", cs, ds, es, cr0);
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printk("CR2: %016lx CR3: %016lx CR4: %016lx\n", cr2, cr3, cr4);
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}
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void show_regs(struct pt_regs *regs)
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{
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printk("CPU %d:", smp_processor_id());
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__show_regs(regs);
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show_trace(NULL, regs, (void *)(regs + 1));
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}
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/*
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* Free current thread data structures etc..
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*/
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void exit_thread(void)
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{
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struct task_struct *me = current;
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struct thread_struct *t = &me->thread;
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if (me->thread.io_bitmap_ptr) {
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struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
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kfree(t->io_bitmap_ptr);
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t->io_bitmap_ptr = NULL;
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clear_thread_flag(TIF_IO_BITMAP);
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/*
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* Careful, clear this in the TSS too:
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*/
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memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
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t->io_bitmap_max = 0;
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put_cpu();
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}
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}
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void flush_thread(void)
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{
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struct task_struct *tsk = current;
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struct thread_info *t = current_thread_info();
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if (t->flags & _TIF_ABI_PENDING) {
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t->flags ^= (_TIF_ABI_PENDING | _TIF_IA32);
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if (t->flags & _TIF_IA32)
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current_thread_info()->status |= TS_COMPAT;
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}
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t->flags &= ~_TIF_DEBUG;
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tsk->thread.debugreg0 = 0;
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tsk->thread.debugreg1 = 0;
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tsk->thread.debugreg2 = 0;
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tsk->thread.debugreg3 = 0;
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tsk->thread.debugreg6 = 0;
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tsk->thread.debugreg7 = 0;
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memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
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/*
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* Forget coprocessor state..
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*/
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clear_fpu(tsk);
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clear_used_math();
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}
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void release_thread(struct task_struct *dead_task)
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{
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if (dead_task->mm) {
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if (dead_task->mm->context.size) {
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printk("WARNING: dead process %8s still has LDT? <%p/%d>\n",
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dead_task->comm,
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dead_task->mm->context.ldt,
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dead_task->mm->context.size);
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BUG();
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}
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}
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}
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static inline void set_32bit_tls(struct task_struct *t, int tls, u32 addr)
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{
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struct user_desc ud = {
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.base_addr = addr,
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.limit = 0xfffff,
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.seg_32bit = 1,
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.limit_in_pages = 1,
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.useable = 1,
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};
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struct n_desc_struct *desc = (void *)t->thread.tls_array;
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desc += tls;
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desc->a = LDT_entry_a(&ud);
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desc->b = LDT_entry_b(&ud);
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}
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static inline u32 read_32bit_tls(struct task_struct *t, int tls)
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{
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struct desc_struct *desc = (void *)t->thread.tls_array;
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desc += tls;
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return desc->base0 |
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(((u32)desc->base1) << 16) |
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(((u32)desc->base2) << 24);
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}
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/*
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* This gets called before we allocate a new thread and copy
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* the current task into it.
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*/
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void prepare_to_copy(struct task_struct *tsk)
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{
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unlazy_fpu(tsk);
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}
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int copy_thread(int nr, unsigned long clone_flags, unsigned long rsp,
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unsigned long unused,
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struct task_struct * p, struct pt_regs * regs)
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{
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int err;
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struct pt_regs * childregs;
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struct task_struct *me = current;
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childregs = ((struct pt_regs *)
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(THREAD_SIZE + task_stack_page(p))) - 1;
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*childregs = *regs;
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childregs->rax = 0;
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childregs->rsp = rsp;
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if (rsp == ~0UL)
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childregs->rsp = (unsigned long)childregs;
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p->thread.rsp = (unsigned long) childregs;
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p->thread.rsp0 = (unsigned long) (childregs+1);
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p->thread.userrsp = me->thread.userrsp;
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set_tsk_thread_flag(p, TIF_FORK);
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p->thread.fs = me->thread.fs;
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p->thread.gs = me->thread.gs;
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asm("mov %%gs,%0" : "=m" (p->thread.gsindex));
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asm("mov %%fs,%0" : "=m" (p->thread.fsindex));
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asm("mov %%es,%0" : "=m" (p->thread.es));
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asm("mov %%ds,%0" : "=m" (p->thread.ds));
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if (unlikely(test_tsk_thread_flag(me, TIF_IO_BITMAP))) {
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p->thread.io_bitmap_ptr = kmalloc(IO_BITMAP_BYTES, GFP_KERNEL);
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if (!p->thread.io_bitmap_ptr) {
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p->thread.io_bitmap_max = 0;
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return -ENOMEM;
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}
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memcpy(p->thread.io_bitmap_ptr, me->thread.io_bitmap_ptr,
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IO_BITMAP_BYTES);
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set_tsk_thread_flag(p, TIF_IO_BITMAP);
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}
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/*
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* Set a new TLS for the child thread?
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*/
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if (clone_flags & CLONE_SETTLS) {
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#ifdef CONFIG_IA32_EMULATION
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if (test_thread_flag(TIF_IA32))
|
|
err = ia32_child_tls(p, childregs);
|
|
else
|
|
#endif
|
|
err = do_arch_prctl(p, ARCH_SET_FS, childregs->r8);
|
|
if (err)
|
|
goto out;
|
|
}
|
|
err = 0;
|
|
out:
|
|
if (err && p->thread.io_bitmap_ptr) {
|
|
kfree(p->thread.io_bitmap_ptr);
|
|
p->thread.io_bitmap_max = 0;
|
|
}
|
|
return err;
|
|
}
|
|
|
|
/*
|
|
* This special macro can be used to load a debugging register
|
|
*/
|
|
#define loaddebug(thread,r) set_debugreg(thread->debugreg ## r, r)
|
|
|
|
static inline void __switch_to_xtra(struct task_struct *prev_p,
|
|
struct task_struct *next_p,
|
|
struct tss_struct *tss)
|
|
{
|
|
struct thread_struct *prev, *next;
|
|
|
|
prev = &prev_p->thread,
|
|
next = &next_p->thread;
|
|
|
|
if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
|
|
loaddebug(next, 0);
|
|
loaddebug(next, 1);
|
|
loaddebug(next, 2);
|
|
loaddebug(next, 3);
|
|
/* no 4 and 5 */
|
|
loaddebug(next, 6);
|
|
loaddebug(next, 7);
|
|
}
|
|
|
|
if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
|
|
/*
|
|
* Copy the relevant range of the IO bitmap.
|
|
* Normally this is 128 bytes or less:
|
|
*/
|
|
memcpy(tss->io_bitmap, next->io_bitmap_ptr,
|
|
max(prev->io_bitmap_max, next->io_bitmap_max));
|
|
} else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
|
|
/*
|
|
* Clear any possible leftover bits:
|
|
*/
|
|
memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* switch_to(x,y) should switch tasks from x to y.
|
|
*
|
|
* This could still be optimized:
|
|
* - fold all the options into a flag word and test it with a single test.
|
|
* - could test fs/gs bitsliced
|
|
*
|
|
* Kprobes not supported here. Set the probe on schedule instead.
|
|
*/
|
|
__kprobes struct task_struct *
|
|
__switch_to(struct task_struct *prev_p, struct task_struct *next_p)
|
|
{
|
|
struct thread_struct *prev = &prev_p->thread,
|
|
*next = &next_p->thread;
|
|
int cpu = smp_processor_id();
|
|
struct tss_struct *tss = &per_cpu(init_tss, cpu);
|
|
|
|
/* we're going to use this soon, after a few expensive things */
|
|
if (next_p->fpu_counter>5)
|
|
prefetch(&next->i387.fxsave);
|
|
|
|
/*
|
|
* Reload esp0, LDT and the page table pointer:
|
|
*/
|
|
tss->rsp0 = next->rsp0;
|
|
|
|
/*
|
|
* Switch DS and ES.
|
|
* This won't pick up thread selector changes, but I guess that is ok.
|
|
*/
|
|
asm volatile("mov %%es,%0" : "=m" (prev->es));
|
|
if (unlikely(next->es | prev->es))
|
|
loadsegment(es, next->es);
|
|
|
|
asm volatile ("mov %%ds,%0" : "=m" (prev->ds));
|
|
if (unlikely(next->ds | prev->ds))
|
|
loadsegment(ds, next->ds);
|
|
|
|
load_TLS(next, cpu);
|
|
|
|
/*
|
|
* Switch FS and GS.
|
|
*/
|
|
{
|
|
unsigned fsindex;
|
|
asm volatile("movl %%fs,%0" : "=r" (fsindex));
|
|
/* segment register != 0 always requires a reload.
|
|
also reload when it has changed.
|
|
when prev process used 64bit base always reload
|
|
to avoid an information leak. */
|
|
if (unlikely(fsindex | next->fsindex | prev->fs)) {
|
|
loadsegment(fs, next->fsindex);
|
|
/* check if the user used a selector != 0
|
|
* if yes clear 64bit base, since overloaded base
|
|
* is always mapped to the Null selector
|
|
*/
|
|
if (fsindex)
|
|
prev->fs = 0;
|
|
}
|
|
/* when next process has a 64bit base use it */
|
|
if (next->fs)
|
|
wrmsrl(MSR_FS_BASE, next->fs);
|
|
prev->fsindex = fsindex;
|
|
}
|
|
{
|
|
unsigned gsindex;
|
|
asm volatile("movl %%gs,%0" : "=r" (gsindex));
|
|
if (unlikely(gsindex | next->gsindex | prev->gs)) {
|
|
load_gs_index(next->gsindex);
|
|
if (gsindex)
|
|
prev->gs = 0;
|
|
}
|
|
if (next->gs)
|
|
wrmsrl(MSR_KERNEL_GS_BASE, next->gs);
|
|
prev->gsindex = gsindex;
|
|
}
|
|
|
|
/* Must be after DS reload */
|
|
unlazy_fpu(prev_p);
|
|
|
|
/*
|
|
* Switch the PDA and FPU contexts.
|
|
*/
|
|
prev->userrsp = read_pda(oldrsp);
|
|
write_pda(oldrsp, next->userrsp);
|
|
write_pda(pcurrent, next_p);
|
|
|
|
write_pda(kernelstack,
|
|
(unsigned long)task_stack_page(next_p) + THREAD_SIZE - PDA_STACKOFFSET);
|
|
#ifdef CONFIG_CC_STACKPROTECTOR
|
|
write_pda(stack_canary, next_p->stack_canary);
|
|
/*
|
|
* Build time only check to make sure the stack_canary is at
|
|
* offset 40 in the pda; this is a gcc ABI requirement
|
|
*/
|
|
BUILD_BUG_ON(offsetof(struct x8664_pda, stack_canary) != 40);
|
|
#endif
|
|
|
|
/*
|
|
* Now maybe reload the debug registers and handle I/O bitmaps
|
|
*/
|
|
if (unlikely((task_thread_info(next_p)->flags & _TIF_WORK_CTXSW))
|
|
|| test_tsk_thread_flag(prev_p, TIF_IO_BITMAP))
|
|
__switch_to_xtra(prev_p, next_p, tss);
|
|
|
|
/* If the task has used fpu the last 5 timeslices, just do a full
|
|
* restore of the math state immediately to avoid the trap; the
|
|
* chances of needing FPU soon are obviously high now
|
|
*/
|
|
if (next_p->fpu_counter>5)
|
|
math_state_restore();
|
|
return prev_p;
|
|
}
|
|
|
|
/*
|
|
* sys_execve() executes a new program.
|
|
*/
|
|
asmlinkage
|
|
long sys_execve(char __user *name, char __user * __user *argv,
|
|
char __user * __user *envp, struct pt_regs regs)
|
|
{
|
|
long error;
|
|
char * filename;
|
|
|
|
filename = getname(name);
|
|
error = PTR_ERR(filename);
|
|
if (IS_ERR(filename))
|
|
return error;
|
|
error = do_execve(filename, argv, envp, ®s);
|
|
if (error == 0) {
|
|
task_lock(current);
|
|
current->ptrace &= ~PT_DTRACE;
|
|
task_unlock(current);
|
|
}
|
|
putname(filename);
|
|
return error;
|
|
}
|
|
|
|
void set_personality_64bit(void)
|
|
{
|
|
/* inherit personality from parent */
|
|
|
|
/* Make sure to be in 64bit mode */
|
|
clear_thread_flag(TIF_IA32);
|
|
|
|
/* TBD: overwrites user setup. Should have two bits.
|
|
But 64bit processes have always behaved this way,
|
|
so it's not too bad. The main problem is just that
|
|
32bit childs are affected again. */
|
|
current->personality &= ~READ_IMPLIES_EXEC;
|
|
}
|
|
|
|
asmlinkage long sys_fork(struct pt_regs *regs)
|
|
{
|
|
return do_fork(SIGCHLD, regs->rsp, regs, 0, NULL, NULL);
|
|
}
|
|
|
|
asmlinkage long
|
|
sys_clone(unsigned long clone_flags, unsigned long newsp,
|
|
void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
|
|
{
|
|
if (!newsp)
|
|
newsp = regs->rsp;
|
|
return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
|
|
}
|
|
|
|
/*
|
|
* This is trivial, and on the face of it looks like it
|
|
* could equally well be done in user mode.
|
|
*
|
|
* Not so, for quite unobvious reasons - register pressure.
|
|
* In user mode vfork() cannot have a stack frame, and if
|
|
* done by calling the "clone()" system call directly, you
|
|
* do not have enough call-clobbered registers to hold all
|
|
* the information you need.
|
|
*/
|
|
asmlinkage long sys_vfork(struct pt_regs *regs)
|
|
{
|
|
return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->rsp, regs, 0,
|
|
NULL, NULL);
|
|
}
|
|
|
|
unsigned long get_wchan(struct task_struct *p)
|
|
{
|
|
unsigned long stack;
|
|
u64 fp,rip;
|
|
int count = 0;
|
|
|
|
if (!p || p == current || p->state==TASK_RUNNING)
|
|
return 0;
|
|
stack = (unsigned long)task_stack_page(p);
|
|
if (p->thread.rsp < stack || p->thread.rsp > stack+THREAD_SIZE)
|
|
return 0;
|
|
fp = *(u64 *)(p->thread.rsp);
|
|
do {
|
|
if (fp < (unsigned long)stack ||
|
|
fp > (unsigned long)stack+THREAD_SIZE)
|
|
return 0;
|
|
rip = *(u64 *)(fp+8);
|
|
if (!in_sched_functions(rip))
|
|
return rip;
|
|
fp = *(u64 *)fp;
|
|
} while (count++ < 16);
|
|
return 0;
|
|
}
|
|
|
|
long do_arch_prctl(struct task_struct *task, int code, unsigned long addr)
|
|
{
|
|
int ret = 0;
|
|
int doit = task == current;
|
|
int cpu;
|
|
|
|
switch (code) {
|
|
case ARCH_SET_GS:
|
|
if (addr >= TASK_SIZE_OF(task))
|
|
return -EPERM;
|
|
cpu = get_cpu();
|
|
/* handle small bases via the GDT because that's faster to
|
|
switch. */
|
|
if (addr <= 0xffffffff) {
|
|
set_32bit_tls(task, GS_TLS, addr);
|
|
if (doit) {
|
|
load_TLS(&task->thread, cpu);
|
|
load_gs_index(GS_TLS_SEL);
|
|
}
|
|
task->thread.gsindex = GS_TLS_SEL;
|
|
task->thread.gs = 0;
|
|
} else {
|
|
task->thread.gsindex = 0;
|
|
task->thread.gs = addr;
|
|
if (doit) {
|
|
load_gs_index(0);
|
|
ret = checking_wrmsrl(MSR_KERNEL_GS_BASE, addr);
|
|
}
|
|
}
|
|
put_cpu();
|
|
break;
|
|
case ARCH_SET_FS:
|
|
/* Not strictly needed for fs, but do it for symmetry
|
|
with gs */
|
|
if (addr >= TASK_SIZE_OF(task))
|
|
return -EPERM;
|
|
cpu = get_cpu();
|
|
/* handle small bases via the GDT because that's faster to
|
|
switch. */
|
|
if (addr <= 0xffffffff) {
|
|
set_32bit_tls(task, FS_TLS, addr);
|
|
if (doit) {
|
|
load_TLS(&task->thread, cpu);
|
|
asm volatile("movl %0,%%fs" :: "r"(FS_TLS_SEL));
|
|
}
|
|
task->thread.fsindex = FS_TLS_SEL;
|
|
task->thread.fs = 0;
|
|
} else {
|
|
task->thread.fsindex = 0;
|
|
task->thread.fs = addr;
|
|
if (doit) {
|
|
/* set the selector to 0 to not confuse
|
|
__switch_to */
|
|
asm volatile("movl %0,%%fs" :: "r" (0));
|
|
ret = checking_wrmsrl(MSR_FS_BASE, addr);
|
|
}
|
|
}
|
|
put_cpu();
|
|
break;
|
|
case ARCH_GET_FS: {
|
|
unsigned long base;
|
|
if (task->thread.fsindex == FS_TLS_SEL)
|
|
base = read_32bit_tls(task, FS_TLS);
|
|
else if (doit)
|
|
rdmsrl(MSR_FS_BASE, base);
|
|
else
|
|
base = task->thread.fs;
|
|
ret = put_user(base, (unsigned long __user *)addr);
|
|
break;
|
|
}
|
|
case ARCH_GET_GS: {
|
|
unsigned long base;
|
|
unsigned gsindex;
|
|
if (task->thread.gsindex == GS_TLS_SEL)
|
|
base = read_32bit_tls(task, GS_TLS);
|
|
else if (doit) {
|
|
asm("movl %%gs,%0" : "=r" (gsindex));
|
|
if (gsindex)
|
|
rdmsrl(MSR_KERNEL_GS_BASE, base);
|
|
else
|
|
base = task->thread.gs;
|
|
}
|
|
else
|
|
base = task->thread.gs;
|
|
ret = put_user(base, (unsigned long __user *)addr);
|
|
break;
|
|
}
|
|
|
|
default:
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
long sys_arch_prctl(int code, unsigned long addr)
|
|
{
|
|
return do_arch_prctl(current, code, addr);
|
|
}
|
|
|
|
/*
|
|
* Capture the user space registers if the task is not running (in user space)
|
|
*/
|
|
int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
|
|
{
|
|
struct pt_regs *pp, ptregs;
|
|
|
|
pp = task_pt_regs(tsk);
|
|
|
|
ptregs = *pp;
|
|
ptregs.cs &= 0xffff;
|
|
ptregs.ss &= 0xffff;
|
|
|
|
elf_core_copy_regs(regs, &ptregs);
|
|
|
|
return 1;
|
|
}
|
|
|
|
unsigned long arch_align_stack(unsigned long sp)
|
|
{
|
|
if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
|
|
sp -= get_random_int() % 8192;
|
|
return sp & ~0xf;
|
|
}
|