1fa2e9ae1d
We are about to add a new driver to support new features like using the TDMA engine to offload the CPU. Orion, Dove and Kirkwood platforms are already using the mv_cesa driver, but Orion SoCs do not embed the TDMA engine, which means we will have to differentiate them if we want to get TDMA support on Dove and Kirkwood. In the other hand, the migration from the old driver to the new one is not something all people are willing to do without first auditing the new driver. Hence we have to support the new compatible in the mv_cesa driver so that new platforms with updated DTs can still attach their crypto engine device to this driver. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
34 lines
1.2 KiB
Plaintext
34 lines
1.2 KiB
Plaintext
Marvell Cryptographic Engines And Security Accelerator
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Required properties:
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- compatible: should be one of the following string
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"marvell,orion-crypto"
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"marvell,kirkwood-crypto"
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"marvell,dove-crypto"
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- reg: base physical address of the engine and length of memory mapped
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region. Can also contain an entry for the SRAM attached to the CESA,
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but this representation is deprecated and marvell,crypto-srams should
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be used instead
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- reg-names: "regs". Can contain an "sram" entry, but this representation
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is deprecated and marvell,crypto-srams should be used instead
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- interrupts: interrupt number
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- clocks: reference to the crypto engines clocks. This property is only
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required for Dove platforms
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- marvell,crypto-srams: phandle to crypto SRAM definitions
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Optional properties:
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- marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not
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specified the whole SRAM is used (2KB)
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Examples:
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crypto@30000 {
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compatible = "marvell,orion-crypto";
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reg = <0x30000 0x10000>;
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reg-names = "regs";
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interrupts = <22>;
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marvell,crypto-srams = <&crypto_sram>;
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marvell,crypto-sram-size = <0x600>;
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status = "okay";
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};
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