07999587b7
Update all the Tegra DT bindings to require resets/reset-names properties where the HW module has reset inputs. Remove any entries from clocks or clock-names that were only required to identify reset inputs, rather than referring to real clocks. This is a DT-ABI-incompatible change. It is the first of two changes required for me to consider the Tegra DT bindings as stable, the other being conversion to the common DMA DT bindings. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
22 lines
743 B
Plaintext
22 lines
743 B
Plaintext
NVIDIA compliant embedded controller
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Required properties:
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- compatible : should be "nvidia,nvec".
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- reg : the iomem of the i2c slave controller
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- interrupts : the interrupt line of the i2c slave controller
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- clock-frequency : the frequency of the i2c bus
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- gpios : the gpio used for ec request
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- slave-addr: the i2c address of the slave controller
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- clocks : Must contain an entry for each entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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- clock-names : Must include the following entries:
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Tegra20/Tegra30:
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- div-clk
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- fast-clk
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Tegra114:
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- div-clk
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- resets : Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names : Must include the following entries:
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- i2c
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