10c9c10c31
This patch implements consistent device DMA handling of memory management. DMA device operations are also here. Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
42 lines
965 B
C
42 lines
965 B
C
/*
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* linux/arch/unicore32/include/mach/dma.h
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*
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* Code specific to PKUnity SoC and UniCore ISA
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*
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* Copyright (C) 2001-2010 GUAN Xue-tao
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __MACH_PUV3_DMA_H__
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#define __MACH_PUV3_DMA_H__
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/*
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* The PKUnity has six internal DMA channels.
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*/
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#define MAX_DMA_CHANNELS 6
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typedef enum {
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DMA_PRIO_HIGH = 0,
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DMA_PRIO_MEDIUM = 1,
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DMA_PRIO_LOW = 2
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} puv3_dma_prio;
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/*
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* DMA registration
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*/
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extern int puv3_request_dma(char *name,
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puv3_dma_prio prio,
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void (*irq_handler)(int, void *),
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void (*err_handler)(int, void *),
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void *data);
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extern void puv3_free_dma(int dma_ch);
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#define puv3_stop_dma(ch) (DMAC_CONFIG(ch) &= ~DMAC_CONFIG_EN)
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#define puv3_resume_dma(ch) (DMAC_CONFIG(ch) |= DMAC_CONFIG_EN)
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#endif /* __MACH_PUV3_DMA_H__ */
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