Martin Schwidefsky 106078641f s390/mm,tlb: correct tlb flush on page table upgrade ... The IDTE instruction used to flush TLB entries for a specific address space uses the address-space-control element (ASCE) to identify affected TLB entries. The upgrade of a page table adds a new top level page table which changes the ASCE. The TLB entries associated with the old ASCE need to be flushed and the ASCE for the address space needs to be replaced synchronously on all CPUs which currently use it. The concept of a lazy ASCE update with an exception handler is broken. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>		2013-11-04 13:51:47 +01:00
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asm	s390/mm,tlb: correct tlb flush on page table upgrade	2013-11-04 13:51:47 +01:00
uapi/asm	s390: fix handling of runtime instrumentation psw bit	2013-10-24 17:17:11 +02:00