394e3902c5
When we stop allocating percpu memory for not-possible CPUs we must not touch the percpu data for not-possible CPUs at all. The correct way of doing this is to test cpu_possible() or to use for_each_cpu(). This patch is a kernel-wide sweep of all instances of NR_CPUS. I found very few instances of this bug, if any. But the patch converts lots of open-coded test to use the preferred helper macros. Cc: Mikael Starvik <starvik@axis.com> Cc: David Howells <dhowells@redhat.com> Acked-by: Kyle McMartin <kyle@parisc-linux.org> Cc: Anton Blanchard <anton@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: William Lee Irwin III <wli@holomorphy.com> Cc: Andi Kleen <ak@muc.de> Cc: Christian Zankel <chris@zankel.net> Cc: Philippe Elie <phil.el@wanadoo.fr> Cc: Nathan Scott <nathans@sgi.com> Cc: Jens Axboe <axboe@suse.de> Cc: Eric Dumazet <dada1@cosmosbay.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
90 lines
2.0 KiB
C
90 lines
2.0 KiB
C
/*
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* linux/arch/m32r/kernel/irq.c
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*
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* Copyright (c) 2003, 2004 Hitoshi Yamamoto
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* Copyright (c) 2004 Hirokazu Takata <takata at linux-m32r.org>
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*/
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/*
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* linux/arch/i386/kernel/irq.c
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*
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* Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
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*
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* This file contains the lowest level m32r-specific interrupt
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* entry and irq statistics code. All the remaining irq logic is
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* done by the generic kernel/irq/ code and in the
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* m32r-specific irq controller code.
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*/
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#include <linux/kernel_stat.h>
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#include <linux/interrupt.h>
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#include <linux/seq_file.h>
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#include <linux/module.h>
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#include <asm/uaccess.h>
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atomic_t irq_err_count;
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atomic_t irq_mis_count;
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/*
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* Generic, controller-independent functions:
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*/
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int show_interrupts(struct seq_file *p, void *v)
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{
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int i = *(loff_t *) v, j;
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struct irqaction * action;
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unsigned long flags;
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if (i == 0) {
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seq_printf(p, " ");
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for_each_online_cpu(j)
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seq_printf(p, "CPU%d ",j);
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seq_putc(p, '\n');
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}
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if (i < NR_IRQS) {
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spin_lock_irqsave(&irq_desc[i].lock, flags);
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action = irq_desc[i].action;
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if (!action)
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goto skip;
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seq_printf(p, "%3d: ",i);
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#ifndef CONFIG_SMP
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seq_printf(p, "%10u ", kstat_irqs(i));
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#else
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
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#endif
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seq_printf(p, " %14s", irq_desc[i].handler->typename);
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seq_printf(p, " %s", action->name);
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for (action=action->next; action; action = action->next)
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seq_printf(p, ", %s", action->name);
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seq_putc(p, '\n');
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skip:
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spin_unlock_irqrestore(&irq_desc[i].lock, flags);
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} else if (i == NR_IRQS) {
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seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
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seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
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}
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return 0;
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}
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/*
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* do_IRQ handles all normal device IRQ's (the special
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* SMP cross-CPU interrupts have their own specific
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* handlers).
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*/
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asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs)
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{
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irq_enter();
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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/* FIXME M32R */
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#endif
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__do_IRQ(irq, regs);
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irq_exit();
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return 1;
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}
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