1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
210 lines
7.1 KiB
C
210 lines
7.1 KiB
C
/************************************************************************/
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/* This module supports the iSeries PCI bus interrupt handling */
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/* Copyright (C) 20yy <Robert L Holtorf> <IBM Corp> */
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/* */
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/* This program is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU General Public License as published by */
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/* the Free Software Foundation; either version 2 of the License, or */
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/* (at your option) any later version. */
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/* */
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/* This program is distributed in the hope that it will be useful, */
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/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
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/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
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/* GNU General Public License for more details. */
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/* */
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/* You should have received a copy of the GNU General Public License */
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/* along with this program; if not, write to the: */
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/* Free Software Foundation, Inc., */
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/* 59 Temple Place, Suite 330, */
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/* Boston, MA 02111-1307 USA */
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/************************************************************************/
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/* Change Activity: */
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/* Created, December 13, 2000 by Wayne Holm */
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/* End Change Activity */
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/************************************************************************/
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/threads.h>
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#include <linux/smp.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/bootmem.h>
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#include <linux/ide.h>
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#include <linux/irq.h>
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#include <linux/spinlock.h>
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#include <asm/ppcdebug.h>
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#include <asm/iSeries/HvCallPci.h>
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#include <asm/iSeries/HvCallXm.h>
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#include <asm/iSeries/iSeries_irq.h>
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#include <asm/iSeries/XmPciLpEvent.h>
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static unsigned int iSeries_startup_IRQ(unsigned int irq);
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static void iSeries_shutdown_IRQ(unsigned int irq);
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static void iSeries_enable_IRQ(unsigned int irq);
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static void iSeries_disable_IRQ(unsigned int irq);
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static void iSeries_end_IRQ(unsigned int irq);
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static hw_irq_controller iSeries_IRQ_handler = {
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.typename = "iSeries irq controller",
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.startup = iSeries_startup_IRQ,
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.shutdown = iSeries_shutdown_IRQ,
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.enable = iSeries_enable_IRQ,
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.disable = iSeries_disable_IRQ,
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.end = iSeries_end_IRQ
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};
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/* This maps virtual irq numbers to real irqs */
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unsigned int virt_irq_to_real_map[NR_IRQS];
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/* The next available virtual irq number */
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/* Note: the pcnet32 driver assumes irq numbers < 2 aren't valid. :( */
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static int next_virtual_irq = 2;
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/* This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c */
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void __init iSeries_init_IRQ(void)
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{
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/* Register PCI event handler and open an event path */
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XmPciLpEvent_init();
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}
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/*
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* This is called out of iSeries_scan_slot to allocate an IRQ for an EADS slot
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* It calculates the irq value for the slot.
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* Note that subBusNumber is always 0 (at the moment at least).
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*/
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int __init iSeries_allocate_IRQ(HvBusNumber busNumber,
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HvSubBusNumber subBusNumber, HvAgentId deviceId)
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{
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unsigned int realirq, virtirq;
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u8 idsel = (deviceId >> 4);
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u8 function = deviceId & 7;
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virtirq = next_virtual_irq++;
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realirq = ((busNumber - 1) << 6) + ((idsel - 1) << 3) + function;
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virt_irq_to_real_map[virtirq] = realirq;
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irq_desc[virtirq].handler = &iSeries_IRQ_handler;
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return virtirq;
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}
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#define REAL_IRQ_TO_BUS(irq) ((((irq) >> 6) & 0xff) + 1)
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#define REAL_IRQ_TO_IDSEL(irq) ((((irq) >> 3) & 7) + 1)
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#define REAL_IRQ_TO_FUNC(irq) ((irq) & 7)
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/* This is called by iSeries_activate_IRQs */
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static unsigned int iSeries_startup_IRQ(unsigned int irq)
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{
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u32 bus, deviceId, function, mask;
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const u32 subBus = 0;
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unsigned int rirq = virt_irq_to_real_map[irq];
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bus = REAL_IRQ_TO_BUS(rirq);
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function = REAL_IRQ_TO_FUNC(rirq);
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deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
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/* Link the IRQ number to the bridge */
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HvCallXm_connectBusUnit(bus, subBus, deviceId, irq);
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/* Unmask bridge interrupts in the FISR */
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mask = 0x01010000 << function;
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HvCallPci_unmaskFisr(bus, subBus, deviceId, mask);
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iSeries_enable_IRQ(irq);
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return 0;
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}
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/*
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* This is called out of iSeries_fixup to activate interrupt
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* generation for usable slots
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*/
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void __init iSeries_activate_IRQs()
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{
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int irq;
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unsigned long flags;
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for_each_irq (irq) {
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irq_desc_t *desc = get_irq_desc(irq);
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if (desc && desc->handler && desc->handler->startup) {
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spin_lock_irqsave(&desc->lock, flags);
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desc->handler->startup(irq);
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spin_unlock_irqrestore(&desc->lock, flags);
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}
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}
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}
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/* this is not called anywhere currently */
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static void iSeries_shutdown_IRQ(unsigned int irq)
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{
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u32 bus, deviceId, function, mask;
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const u32 subBus = 0;
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unsigned int rirq = virt_irq_to_real_map[irq];
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/* irq should be locked by the caller */
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bus = REAL_IRQ_TO_BUS(rirq);
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function = REAL_IRQ_TO_FUNC(rirq);
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deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
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/* Invalidate the IRQ number in the bridge */
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HvCallXm_connectBusUnit(bus, subBus, deviceId, 0);
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/* Mask bridge interrupts in the FISR */
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mask = 0x01010000 << function;
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HvCallPci_maskFisr(bus, subBus, deviceId, mask);
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}
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/*
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* This will be called by device drivers (via disable_IRQ)
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* to disable INTA in the bridge interrupt status register.
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*/
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static void iSeries_disable_IRQ(unsigned int irq)
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{
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u32 bus, deviceId, function, mask;
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const u32 subBus = 0;
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unsigned int rirq = virt_irq_to_real_map[irq];
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/* The IRQ has already been locked by the caller */
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bus = REAL_IRQ_TO_BUS(rirq);
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function = REAL_IRQ_TO_FUNC(rirq);
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deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
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/* Mask secondary INTA */
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mask = 0x80000000;
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HvCallPci_maskInterrupts(bus, subBus, deviceId, mask);
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PPCDBG(PPCDBG_BUSWALK, "iSeries_disable_IRQ 0x%02X.%02X.%02X 0x%04X\n",
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bus, subBus, deviceId, irq);
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}
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/*
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* This will be called by device drivers (via enable_IRQ)
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* to enable INTA in the bridge interrupt status register.
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*/
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static void iSeries_enable_IRQ(unsigned int irq)
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{
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u32 bus, deviceId, function, mask;
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const u32 subBus = 0;
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unsigned int rirq = virt_irq_to_real_map[irq];
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/* The IRQ has already been locked by the caller */
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bus = REAL_IRQ_TO_BUS(rirq);
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function = REAL_IRQ_TO_FUNC(rirq);
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deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
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/* Unmask secondary INTA */
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mask = 0x80000000;
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HvCallPci_unmaskInterrupts(bus, subBus, deviceId, mask);
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PPCDBG(PPCDBG_BUSWALK, "iSeries_enable_IRQ 0x%02X.%02X.%02X 0x%04X\n",
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bus, subBus, deviceId, irq);
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}
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/*
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* Need to define this so ppc_irq_dispatch_handler will NOT call
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* enable_IRQ at the end of interrupt handling. However, this does
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* nothing because there is not enough information provided to do
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* the EOI HvCall. This is done by XmPciLpEvent.c
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*/
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static void iSeries_end_IRQ(unsigned int irq)
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{
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}
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