fc467a2623
The DMABRG is a special DMA unit within the SH7760 which does data transfers from main memory to Audio units and USB shared memory. It has 3 IRQ lines which generate 10 events, which have to be masked unmasked and acked in a single 32bit register. It works independently from the tradition SH DMAC, but blocks usage of DMAC channel 0. This patch adds 2 functions to associate callbacks with DMABRG events and initialization. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
65 lines
1.9 KiB
Plaintext
65 lines
1.9 KiB
Plaintext
menu "DMA support"
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config SH_DMA_API
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bool
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config SH_DMA
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bool "SuperH on-chip DMA controller (DMAC) support"
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select SH_DMA_API
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default n
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config NR_ONCHIP_DMA_CHANNELS
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depends on SH_DMA
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int "Number of on-chip DMAC channels"
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default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R
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default "12" if CPU_SUBTYPE_SH7780
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default "4"
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help
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This allows you to specify the number of channels that the on-chip
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DMAC supports. This will be 4 for SH7750/SH7751 and 8 for the
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SH7750R/SH7751R.
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config NR_DMA_CHANNELS_BOOL
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depends on SH_DMA
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bool "Override default number of maximum DMA channels"
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help
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This allows you to forcibly update the maximum number of supported
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DMA channels for a given board. If this is unset, this will default
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to the number of channels that the on-chip DMAC has.
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config NR_DMA_CHANNELS
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int "Maximum number of DMA channels"
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depends on SH_DMA && NR_DMA_CHANNELS_BOOL
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default NR_ONCHIP_DMA_CHANNELS
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help
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This allows you to specify the maximum number of DMA channels to
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support. Setting this to a higher value allows for cascading DMACs
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with additional channels.
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config DMA_PAGE_OPS
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bool "Use DMAC for page copy/clear"
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depends on SH_DMA && BROKEN
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help
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Selecting this option will use a dual-address mode configured channel
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in the SH DMAC for copy_page()/clear_page(). Primarily a performance
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hack.
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config DMA_PAGE_OPS_CHANNEL
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depends on DMA_PAGE_OPS
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int "DMA channel for sh memory-manager page copy/clear"
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default "3"
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help
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This allows the specification of the dual address dma channel,
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in case channel 3 is unavailable. On the SH4, channels 1,2, and 3
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are dual-address capable.
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config SH_DMABRG
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bool "SH7760 DMABRG support"
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depends on CPU_SUBTYPE_SH7760
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help
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The DMABRG does data transfers from main memory to Audio/USB units
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of the SH7760.
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Say Y if you want to use Audio/USB DMA on your SH7760 board.
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endmenu
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