Kevin D. Kissell 0db34215c7 [MIPS] SMTC: Interrupt mask backstop hack ... To support multiple TC microthreads acting as "CPUs" within a VPE, VPE-wide interrupt mask bits must be specially manipulated during interrupt handling. To support legacy drivers and interrupt controller management code, SMTC has a "backstop" to track and if necessary restore the interrupt mask. This has some performance impact on interrupt service overhead. Disable it only if you know what you are doing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2007-07-12 17:41:17 +01:00
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alpha
arm
arm26
avr32
blackfin
cris
frv
h8300
i386	sched: x86, track TSC-unstable events	2007-07-09 18:51:59 +02:00
ia64	sched: zap the migration init / cache-hot balancing code	2007-07-09 18:51:57 +02:00
m32r
m68k
m68knommu
mips	[MIPS] SMTC: Interrupt mask backstop hack	2007-07-12 17:41:17 +01:00
parisc
powerpc
ppc
s390	[S390] s390: rename CPU_IDLE to S390_CPU_IDLE	2007-07-10 11:24:53 +02:00
sh
sh64
sparc	sched: zap the migration init / cache-hot balancing code	2007-07-09 18:51:57 +02:00
sparc64	sched: zap the migration init / cache-hot balancing code	2007-07-09 18:51:57 +02:00
um
v850
x86_64
xtensa