d0fb47a523
Make FSL eSPI CSnBEF and CSnAFT fields in ESPI_SPMODEn registers (n=0,1,2,3) configurable through device tree. CSnBEF is the chip select setup time. It's the delay in bits from the activation of chip select pin to the first clock for data frame. CSnAFT is the chip select hold time. It's the delay in bits from the last clock for data frame to the deactivation of chip select pin. The FSL eSPI driver hardcodes CSnBEF and CSnAFT to 0. Need to set them to a different value for some device. Signed-off-by: Jane Wan <Jane.Wan@gainspeed.com> Signed-off-by: Mark Brown <broonie@linaro.org>
61 lines
1.9 KiB
Plaintext
61 lines
1.9 KiB
Plaintext
* SPI (Serial Peripheral Interface)
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Required properties:
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- cell-index : QE SPI subblock index.
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0: QE subblock SPI1
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1: QE subblock SPI2
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- compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl".
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- mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
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- reg : Offset and length of the register set for the device
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- interrupts : <a b> where a is the interrupt number and b is a
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field that represents an encoding of the sense and level
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information for the interrupt. This should be encoded based on
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the information in section 2) depending on the type of interrupt
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controller you have.
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- interrupt-parent : the phandle for the interrupt controller that
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services interrupts for this device.
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- clock-frequency : input clock frequency to non FSL_SOC cores
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Optional properties:
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- gpios : specifies the gpio pins to be used for chipselects.
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The gpios will be referred to as reg = <index> in the SPI child nodes.
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If unspecified, a single SPI device without a chip select can be used.
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Example:
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spi@4c0 {
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cell-index = <0>;
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compatible = "fsl,spi";
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reg = <4c0 40>;
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interrupts = <82 0>;
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interrupt-parent = <700>;
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mode = "cpu";
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gpios = <&gpio 18 1 // device reg=<0>
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&gpio 19 1>; // device reg=<1>
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};
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* eSPI (Enhanced Serial Peripheral Interface)
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Required properties:
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- compatible : should be "fsl,mpc8536-espi".
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- reg : Offset and length of the register set for the device.
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- interrupts : should contain eSPI interrupt, the device has one interrupt.
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- fsl,espi-num-chipselects : the number of the chipselect signals.
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Optional properties:
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- fsl,csbef: chip select assertion time in bits before frame starts
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- fsl,csaft: chip select negation time in bits after frame ends
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Example:
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spi@110000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,mpc8536-espi";
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reg = <0x110000 0x1000>;
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interrupts = <53 0x2>;
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interrupt-parent = <&mpic>;
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fsl,espi-num-chipselects = <4>;
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fsl,csbef = <1>;
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fsl,csaft = <1>;
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};
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