08d9f57251
Introduce an ops struct with read, write, and reset functions to abstract away the details of the wl1251 bus interface. Doing this will allow SDIO to coexist with SPI by supplying its own I/O routines. Signed-off-by: Bob Copeland <me@bobcopeland.com> Signed-off-by: Kalle Valo <kalle.valo@nokia.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
428 lines
10 KiB
C
428 lines
10 KiB
C
/*
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* This file is part of wl1251
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*
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* Copyright (c) 1998-2007 Texas Instruments Incorporated
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* Copyright (C) 2008-2009 Nokia Corporation
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*
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* Contact: Kalle Valo <kalle.valo@nokia.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#ifndef __WL1251_H__
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#define __WL1251_H__
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#include <linux/mutex.h>
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#include <linux/list.h>
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#include <linux/bitops.h>
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#include <net/mac80211.h>
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#define DRIVER_NAME "wl1251"
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#define DRIVER_PREFIX DRIVER_NAME ": "
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enum {
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DEBUG_NONE = 0,
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DEBUG_IRQ = BIT(0),
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DEBUG_SPI = BIT(1),
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DEBUG_BOOT = BIT(2),
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DEBUG_MAILBOX = BIT(3),
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DEBUG_NETLINK = BIT(4),
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DEBUG_EVENT = BIT(5),
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DEBUG_TX = BIT(6),
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DEBUG_RX = BIT(7),
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DEBUG_SCAN = BIT(8),
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DEBUG_CRYPT = BIT(9),
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DEBUG_PSM = BIT(10),
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DEBUG_MAC80211 = BIT(11),
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DEBUG_CMD = BIT(12),
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DEBUG_ACX = BIT(13),
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DEBUG_ALL = ~0,
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};
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#define DEBUG_LEVEL (DEBUG_NONE)
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#define DEBUG_DUMP_LIMIT 1024
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#define wl1251_error(fmt, arg...) \
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printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
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#define wl1251_warning(fmt, arg...) \
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printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
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#define wl1251_notice(fmt, arg...) \
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printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
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#define wl1251_info(fmt, arg...) \
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printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)
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#define wl1251_debug(level, fmt, arg...) \
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do { \
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if (level & DEBUG_LEVEL) \
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printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
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} while (0)
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#define wl1251_dump(level, prefix, buf, len) \
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do { \
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if (level & DEBUG_LEVEL) \
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print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
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DUMP_PREFIX_OFFSET, 16, 1, \
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buf, \
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min_t(size_t, len, DEBUG_DUMP_LIMIT), \
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0); \
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} while (0)
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#define wl1251_dump_ascii(level, prefix, buf, len) \
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do { \
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if (level & DEBUG_LEVEL) \
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print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
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DUMP_PREFIX_OFFSET, 16, 1, \
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buf, \
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min_t(size_t, len, DEBUG_DUMP_LIMIT), \
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true); \
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} while (0)
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#define WL1251_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \
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CFG_BSSID_FILTER_EN)
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#define WL1251_DEFAULT_RX_FILTER (CFG_RX_PRSP_EN | \
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CFG_RX_MGMT_EN | \
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CFG_RX_DATA_EN | \
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CFG_RX_CTL_EN | \
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CFG_RX_BCN_EN | \
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CFG_RX_AUTH_EN | \
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CFG_RX_ASSOC_EN)
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#define WL1251_BUSY_WORD_LEN 8
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struct boot_attr {
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u32 radio_type;
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u8 mac_clock;
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u8 arm_clock;
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int firmware_debug;
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u32 minor;
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u32 major;
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u32 bugfix;
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};
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enum wl1251_state {
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WL1251_STATE_OFF,
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WL1251_STATE_ON,
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WL1251_STATE_PLT,
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};
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enum wl1251_partition_type {
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PART_DOWN,
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PART_WORK,
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PART_DRPW,
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PART_TABLE_LEN
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};
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struct wl1251_partition {
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u32 size;
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u32 start;
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};
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struct wl1251_partition_set {
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struct wl1251_partition mem;
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struct wl1251_partition reg;
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};
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struct wl1251;
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/* FIXME: I'm not sure about this structure name */
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struct wl1251_chip {
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u32 id;
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const char *fw_filename;
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const char *nvs_filename;
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char fw_ver[21];
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unsigned int power_on_sleep;
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int intr_cmd_complete;
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int intr_init_complete;
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int (*op_upload_fw)(struct wl1251 *wl);
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int (*op_upload_nvs)(struct wl1251 *wl);
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int (*op_boot)(struct wl1251 *wl);
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void (*op_set_ecpu_ctrl)(struct wl1251 *wl, u32 flag);
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void (*op_target_enable_interrupts)(struct wl1251 *wl);
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int (*op_hw_init)(struct wl1251 *wl);
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int (*op_plt_init)(struct wl1251 *wl);
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void (*op_tx_flush)(struct wl1251 *wl);
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void (*op_fw_version)(struct wl1251 *wl);
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int (*op_cmd_join)(struct wl1251 *wl, u8 bss_type, u8 dtim_interval,
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u16 beacon_interval, u8 wait);
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struct wl1251_partition_set *p_table;
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enum wl12xx_acx_int_reg *acx_reg_table;
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};
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struct wl1251_stats {
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struct acx_statistics *fw_stats;
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unsigned long fw_stats_update;
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unsigned int retry_count;
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unsigned int excessive_retries;
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};
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struct wl1251_debugfs {
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struct dentry *rootdir;
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struct dentry *fw_statistics;
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struct dentry *tx_internal_desc_overflow;
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struct dentry *rx_out_of_mem;
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struct dentry *rx_hdr_overflow;
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struct dentry *rx_hw_stuck;
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struct dentry *rx_dropped;
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struct dentry *rx_fcs_err;
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struct dentry *rx_xfr_hint_trig;
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struct dentry *rx_path_reset;
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struct dentry *rx_reset_counter;
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struct dentry *dma_rx_requested;
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struct dentry *dma_rx_errors;
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struct dentry *dma_tx_requested;
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struct dentry *dma_tx_errors;
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struct dentry *isr_cmd_cmplt;
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struct dentry *isr_fiqs;
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struct dentry *isr_rx_headers;
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struct dentry *isr_rx_mem_overflow;
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struct dentry *isr_rx_rdys;
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struct dentry *isr_irqs;
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struct dentry *isr_tx_procs;
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struct dentry *isr_decrypt_done;
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struct dentry *isr_dma0_done;
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struct dentry *isr_dma1_done;
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struct dentry *isr_tx_exch_complete;
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struct dentry *isr_commands;
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struct dentry *isr_rx_procs;
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struct dentry *isr_hw_pm_mode_changes;
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struct dentry *isr_host_acknowledges;
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struct dentry *isr_pci_pm;
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struct dentry *isr_wakeups;
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struct dentry *isr_low_rssi;
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struct dentry *wep_addr_key_count;
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struct dentry *wep_default_key_count;
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/* skipping wep.reserved */
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struct dentry *wep_key_not_found;
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struct dentry *wep_decrypt_fail;
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struct dentry *wep_packets;
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struct dentry *wep_interrupt;
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struct dentry *pwr_ps_enter;
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struct dentry *pwr_elp_enter;
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struct dentry *pwr_missing_bcns;
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struct dentry *pwr_wake_on_host;
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struct dentry *pwr_wake_on_timer_exp;
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struct dentry *pwr_tx_with_ps;
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struct dentry *pwr_tx_without_ps;
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struct dentry *pwr_rcvd_beacons;
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struct dentry *pwr_power_save_off;
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struct dentry *pwr_enable_ps;
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struct dentry *pwr_disable_ps;
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struct dentry *pwr_fix_tsf_ps;
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/* skipping cont_miss_bcns_spread for now */
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struct dentry *pwr_rcvd_awake_beacons;
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struct dentry *mic_rx_pkts;
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struct dentry *mic_calc_failure;
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struct dentry *aes_encrypt_fail;
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struct dentry *aes_decrypt_fail;
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struct dentry *aes_encrypt_packets;
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struct dentry *aes_decrypt_packets;
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struct dentry *aes_encrypt_interrupt;
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struct dentry *aes_decrypt_interrupt;
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struct dentry *event_heart_beat;
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struct dentry *event_calibration;
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struct dentry *event_rx_mismatch;
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struct dentry *event_rx_mem_empty;
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struct dentry *event_rx_pool;
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struct dentry *event_oom_late;
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struct dentry *event_phy_transmit_error;
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struct dentry *event_tx_stuck;
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struct dentry *ps_pspoll_timeouts;
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struct dentry *ps_upsd_timeouts;
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struct dentry *ps_upsd_max_sptime;
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struct dentry *ps_upsd_max_apturn;
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struct dentry *ps_pspoll_max_apturn;
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struct dentry *ps_pspoll_utilization;
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struct dentry *ps_upsd_utilization;
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struct dentry *rxpipe_rx_prep_beacon_drop;
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struct dentry *rxpipe_descr_host_int_trig_rx_data;
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struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data;
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struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data;
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struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data;
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struct dentry *tx_queue_len;
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struct dentry *retry_count;
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struct dentry *excessive_retries;
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};
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struct wl1251_if_operations {
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void (*read)(struct wl1251 *wl, int addr, void *buf, size_t len);
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void (*write)(struct wl1251 *wl, int addr, void *buf, size_t len);
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void (*reset)(struct wl1251 *wl);
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};
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struct wl1251 {
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struct ieee80211_hw *hw;
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bool mac80211_registered;
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struct spi_device *spi;
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struct wl1251_if_operations *if_ops;
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void (*set_power)(bool enable);
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int irq;
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enum wl1251_state state;
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struct mutex mutex;
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int physical_mem_addr;
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int physical_reg_addr;
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int virtual_mem_addr;
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int virtual_reg_addr;
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struct wl1251_chip chip;
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int cmd_box_addr;
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int event_box_addr;
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struct boot_attr boot_attr;
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u8 *fw;
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size_t fw_len;
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u8 *nvs;
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size_t nvs_len;
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u8 bssid[ETH_ALEN];
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u8 mac_addr[ETH_ALEN];
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u8 bss_type;
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u8 listen_int;
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int channel;
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void *target_mem_map;
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struct acx_data_path_params_resp *data_path;
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/* Number of TX packets transferred to the FW, modulo 16 */
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u32 data_in_count;
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/* Frames scheduled for transmission, not handled yet */
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struct sk_buff_head tx_queue;
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bool tx_queue_stopped;
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struct work_struct tx_work;
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struct work_struct filter_work;
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/* Pending TX frames */
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struct sk_buff *tx_frames[16];
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/*
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* Index pointing to the next TX complete entry
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* in the cyclic XT complete array we get from
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* the FW.
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*/
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u32 next_tx_complete;
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/* FW Rx counter */
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u32 rx_counter;
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/* Rx frames handled */
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u32 rx_handled;
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/* Current double buffer */
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u32 rx_current_buffer;
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u32 rx_last_id;
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/* The target interrupt mask */
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u32 intr_mask;
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struct work_struct irq_work;
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/* The mbox event mask */
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u32 event_mask;
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/* Mailbox pointers */
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u32 mbox_ptr[2];
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/* Are we currently scanning */
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bool scanning;
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/* Our association ID */
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u16 aid;
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/* Default key (for WEP) */
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u32 default_key;
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unsigned int tx_mgmt_frm_rate;
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unsigned int tx_mgmt_frm_mod;
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unsigned int rx_config;
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unsigned int rx_filter;
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/* is firmware in elp mode */
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bool elp;
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/* we can be in psm, but not in elp, we have to differentiate */
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bool psm;
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/* PSM mode requested */
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bool psm_requested;
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/* in dBm */
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int power_level;
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struct wl1251_stats stats;
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struct wl1251_debugfs debugfs;
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u32 buffer_32;
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u32 buffer_cmd;
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u8 buffer_busyword[WL1251_BUSY_WORD_LEN];
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struct wl1251_rx_descriptor *rx_descriptor;
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};
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int wl1251_plt_start(struct wl1251 *wl);
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int wl1251_plt_stop(struct wl1251 *wl);
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#define DEFAULT_HW_GEN_MODULATION_TYPE CCK_LONG /* Long Preamble */
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#define DEFAULT_HW_GEN_TX_RATE RATE_2MBPS
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#define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
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#define WL1251_DEFAULT_POWER_LEVEL 20
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#define WL1251_TX_QUEUE_MAX_LENGTH 20
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/* Different chips need different sleep times after power on. WL1271 needs
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* 200ms, WL1251 needs only 10ms. By default we use 200ms, but as soon as we
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* know the chip ID, we change the sleep value in the wl1251 chip structure,
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* so in subsequent power ons, we don't waste more time then needed. */
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#define WL1251_DEFAULT_POWER_ON_SLEEP 200
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#define CHIP_ID_1251_PG10 (0x7010101)
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#define CHIP_ID_1251_PG11 (0x7020101)
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#define CHIP_ID_1251_PG12 (0x7030101)
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#define CHIP_ID_1271_PG10 (0x4030101)
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#define CHIP_ID_1271_PG20 (0x4030111)
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#endif
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