Tomi Valkeinen 0856eba75c OMAPDSS: HDMI: fix regsd write ... HDMI PLL's REGSD field is only set by the driver if the PLL's output clock is over 1GHz. This is clearly an error, as REGSD should be set always. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>		2014-10-22 11:11:18 +03:00
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backlight	Changes to existing drivers	2014-10-11 06:38:33 -04:00
console	framebuffer: fix border color	2014-09-30 13:39:16 +03:00
fbdev	OMAPDSS: HDMI: fix regsd write	2014-10-22 11:11:18 +03:00
logo	x86, platforms: Remove SGI Visual Workstation	2014-02-27 08:07:39 -08:00
display_timing.c	video: add display_timing and videomode	2013-01-24 09:03:04 +01:00
hdmi.c	video/hdmi: Rename HDMI_IDENTIFIER to HDMI_IEEE_OUI	2013-08-30 08:42:01 +10:00
Kconfig	gpu: ipu-v3: Move i.MX IPUv3 core driver out of staging	2014-06-04 11:06:52 +02:00
Makefile	video: move fbdev to drivers/video/fbdev	2014-04-17 08:10:19 +03:00
of_display_timing.c	fbdev changes for 3.18	2014-10-18 18:03:02 -07:00
of_videomode.c	videomode: videomode_from_timing work	2013-03-21 14:34:33 +02:00
vgastate.c
videomode.c	videomode: videomode_from_timing work	2013-03-21 14:34:33 +02:00