fffe01f7a7
It turns out that some UEFI systems provide apparently an apparently valid PCI ROM BAR that turns out to contain garbage, so the attempt in547b52463to prefer the ROM from the BAR actually breaks a different set of machines. As Linus pointed out, the graphics drivers are probably in the best position to make this judgement, so this basically reverts547b52463andf9a37be0fand adds a new helper function. Followup patches will add support to nouveau and radeon for probing this ROM source if they can't find a ROM from some other source. [bhelgaas: added reporter and bugzilla pointers, s/f4eb5ff05/547b52463] Reference: https://bugzilla.redhat.com/show_bug.cgi?id=927451 Reference: http://lkml.kernel.org/r/kg69ef$vdb$1@ger.gmane.org Reported-by: Mantas Mikulėnas <grawity@gmail.com> Reported-by: Chris Murphy <bugzilla@colorremedies.com> Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
229 lines
6.1 KiB
C
229 lines
6.1 KiB
C
/*
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* drivers/pci/rom.c
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*
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* (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
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* (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
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*
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* PCI ROM access routines
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*/
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#include <linux/kernel.h>
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#include <linux/export.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include "pci.h"
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/**
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* pci_enable_rom - enable ROM decoding for a PCI device
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* @pdev: PCI device to enable
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*
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* Enable ROM decoding on @dev. This involves simply turning on the last
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* bit of the PCI ROM BAR. Note that some cards may share address decoders
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* between the ROM and other resources, so enabling it may disable access
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* to MMIO registers or other card memory.
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*/
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int pci_enable_rom(struct pci_dev *pdev)
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{
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struct resource *res = pdev->resource + PCI_ROM_RESOURCE;
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struct pci_bus_region region;
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u32 rom_addr;
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if (!res->flags)
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return -1;
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pcibios_resource_to_bus(pdev, ®ion, res);
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pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
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rom_addr &= ~PCI_ROM_ADDRESS_MASK;
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rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE;
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pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
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return 0;
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}
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/**
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* pci_disable_rom - disable ROM decoding for a PCI device
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* @pdev: PCI device to disable
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*
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* Disable ROM decoding on a PCI device by turning off the last bit in the
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* ROM BAR.
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*/
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void pci_disable_rom(struct pci_dev *pdev)
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{
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u32 rom_addr;
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pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
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rom_addr &= ~PCI_ROM_ADDRESS_ENABLE;
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pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
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}
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/**
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* pci_get_rom_size - obtain the actual size of the ROM image
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* @pdev: target PCI device
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* @rom: kernel virtual pointer to image of ROM
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* @size: size of PCI window
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* return: size of actual ROM image
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*
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* Determine the actual length of the ROM image.
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* The PCI window size could be much larger than the
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* actual image size.
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*/
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size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size)
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{
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void __iomem *image;
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int last_image;
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image = rom;
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do {
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void __iomem *pds;
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/* Standard PCI ROMs start out with these bytes 55 AA */
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if (readb(image) != 0x55) {
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dev_err(&pdev->dev, "Invalid ROM contents\n");
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break;
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}
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if (readb(image + 1) != 0xAA)
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break;
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/* get the PCI data structure and check its signature */
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pds = image + readw(image + 24);
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if (readb(pds) != 'P')
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break;
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if (readb(pds + 1) != 'C')
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break;
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if (readb(pds + 2) != 'I')
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break;
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if (readb(pds + 3) != 'R')
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break;
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last_image = readb(pds + 21) & 0x80;
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/* this length is reliable */
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image += readw(pds + 16) * 512;
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} while (!last_image);
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/* never return a size larger than the PCI resource window */
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/* there are known ROMs that get the size wrong */
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return min((size_t)(image - rom), size);
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}
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/**
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* pci_map_rom - map a PCI ROM to kernel space
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* @pdev: pointer to pci device struct
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* @size: pointer to receive size of pci window over ROM
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*
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* Return: kernel virtual pointer to image of ROM
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*
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* Map a PCI ROM into kernel space. If ROM is boot video ROM,
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* the shadow BIOS copy will be returned instead of the
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* actual ROM.
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*/
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void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
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{
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struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
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loff_t start;
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void __iomem *rom;
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/*
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* IORESOURCE_ROM_SHADOW set on x86, x86_64 and IA64 supports legacy
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* memory map if the VGA enable bit of the Bridge Control register is
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* set for embedded VGA.
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*/
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if (res->flags & IORESOURCE_ROM_SHADOW) {
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/* primary video rom always starts here */
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start = (loff_t)0xC0000;
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*size = 0x20000; /* cover C000:0 through E000:0 */
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} else {
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if (res->flags &
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(IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY)) {
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*size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
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return (void __iomem *)(unsigned long)
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pci_resource_start(pdev, PCI_ROM_RESOURCE);
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} else {
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/* assign the ROM an address if it doesn't have one */
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if (res->parent == NULL &&
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pci_assign_resource(pdev,PCI_ROM_RESOURCE))
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return NULL;
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start = pci_resource_start(pdev, PCI_ROM_RESOURCE);
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*size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
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if (*size == 0)
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return NULL;
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/* Enable ROM space decodes */
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if (pci_enable_rom(pdev))
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return NULL;
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}
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}
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rom = ioremap(start, *size);
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if (!rom) {
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/* restore enable if ioremap fails */
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if (!(res->flags & (IORESOURCE_ROM_ENABLE |
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IORESOURCE_ROM_SHADOW |
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IORESOURCE_ROM_COPY)))
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pci_disable_rom(pdev);
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return NULL;
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}
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/*
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* Try to find the true size of the ROM since sometimes the PCI window
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* size is much larger than the actual size of the ROM.
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* True size is important if the ROM is going to be copied.
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*/
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*size = pci_get_rom_size(pdev, rom, *size);
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return rom;
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}
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/**
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* pci_unmap_rom - unmap the ROM from kernel space
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* @pdev: pointer to pci device struct
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* @rom: virtual address of the previous mapping
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*
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* Remove a mapping of a previously mapped ROM
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*/
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void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom)
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{
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struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
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if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY))
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return;
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iounmap(rom);
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/* Disable again before continuing, leave enabled if pci=rom */
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if (!(res->flags & (IORESOURCE_ROM_ENABLE | IORESOURCE_ROM_SHADOW)))
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pci_disable_rom(pdev);
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}
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/**
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* pci_cleanup_rom - free the ROM copy created by pci_map_rom_copy
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* @pdev: pointer to pci device struct
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*
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* Free the copied ROM if we allocated one.
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*/
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void pci_cleanup_rom(struct pci_dev *pdev)
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{
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struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
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if (res->flags & IORESOURCE_ROM_COPY) {
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kfree((void*)(unsigned long)res->start);
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res->flags &= ~IORESOURCE_ROM_COPY;
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res->start = 0;
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res->end = 0;
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}
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}
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/**
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* pci_platform_rom - provides a pointer to any ROM image provided by the
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* platform
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* @pdev: pointer to pci device struct
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* @size: pointer to receive size of pci window over ROM
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*/
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void __iomem *pci_platform_rom(struct pci_dev *pdev, size_t *size)
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{
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if (pdev->rom && pdev->romlen) {
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*size = pdev->romlen;
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return phys_to_virt((phys_addr_t)pdev->rom);
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}
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return NULL;
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}
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EXPORT_SYMBOL(pci_map_rom);
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EXPORT_SYMBOL(pci_unmap_rom);
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EXPORT_SYMBOL_GPL(pci_enable_rom);
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EXPORT_SYMBOL_GPL(pci_disable_rom);
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EXPORT_SYMBOL(pci_platform_rom);
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