40e8b3a690
As reset GPIO information is PHY specific detail, adding it to PHY DT node. Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
17 lines
621 B
Plaintext
17 lines
621 B
Plaintext
Tegra SOC USB PHY
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The device node for Tegra SOC USB PHY:
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Required properties :
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- compatible : Should be "nvidia,tegra20-usb-phy".
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- reg : Address and length of the register set for the USB PHY interface.
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- phy_type : Should be one of "ulpi" or "utmi".
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Required properties for phy_type == ulpi:
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- nvidia,phy-reset-gpio : The GPIO used to reset the PHY.
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Optional properties:
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- nvidia,has-legacy-mode : boolean indicates whether this controller can
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operate in legacy mode (as APX 2500 / 2600). In legacy mode some
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registers are accessed through the APB_MISC base address instead of
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the USB controller. |