49521f97cc
This patch allows users to override both host and device side cable detection with "ideX=ata66" kernel parameter. Thanks to this it should be now possible to use UDMA > 2 modes on systems (laptops mainly) which use short 40-pin cable instead of 80-pin one. Next patches add automatic detection of some systems using short cables. Changes: * Rename hwif->udma_four to hwif->cbl and make it u8. * Convert all existing users accordingly (use ATA_CBL_* defines while at it). * Add ATA_CBL_PATA40_SHORT support to ide-iops.c:eighty_ninty_three(). * Use ATA_CBL_PATA40_SHORT for "ideX=ata66" kernel parameter. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Reviewed-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
326 lines
7.7 KiB
C
326 lines
7.7 KiB
C
/*
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* ITE 8213 IDE driver
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*
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* Copyright (C) 2006 Jack Lee
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* Copyright (C) 2006 Alan Cox
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* Copyright (C) 2007 Bartlomiej Zolnierkiewicz
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/hdreg.h>
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#include <linux/ide.h>
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#include <linux/init.h>
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#include <asm/io.h>
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/**
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* it8213_dma_2_pio - return the PIO mode matching DMA
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* @xfer_rate: transfer speed
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*
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* Returns the nearest equivalent PIO timing for the PIO or DMA
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* mode requested by the controller.
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*/
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static u8 it8213_dma_2_pio (u8 xfer_rate) {
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switch(xfer_rate) {
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case XFER_UDMA_6:
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case XFER_UDMA_5:
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case XFER_UDMA_4:
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case XFER_UDMA_3:
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case XFER_UDMA_2:
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case XFER_UDMA_1:
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case XFER_UDMA_0:
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case XFER_MW_DMA_2:
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case XFER_PIO_4:
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return 4;
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case XFER_MW_DMA_1:
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case XFER_PIO_3:
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return 3;
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case XFER_SW_DMA_2:
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case XFER_PIO_2:
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return 2;
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case XFER_MW_DMA_0:
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case XFER_SW_DMA_1:
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case XFER_SW_DMA_0:
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case XFER_PIO_1:
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case XFER_PIO_0:
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case XFER_PIO_SLOW:
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default:
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return 0;
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}
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}
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/*
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* it8213_tuneproc - tune a drive
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* @drive: drive to tune
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* @pio: desired PIO mode
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*
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* Set the interface PIO mode.
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*/
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static void it8213_tuneproc (ide_drive_t *drive, u8 pio)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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int is_slave = drive->dn & 1;
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int master_port = 0x40;
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int slave_port = 0x44;
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unsigned long flags;
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u16 master_data;
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u8 slave_data;
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static DEFINE_SPINLOCK(tune_lock);
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int control = 0;
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static const u8 timings[][2]= {
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{ 0, 0 },
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{ 0, 0 },
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{ 1, 0 },
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{ 2, 1 },
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{ 2, 3 }, };
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pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
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spin_lock_irqsave(&tune_lock, flags);
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pci_read_config_word(dev, master_port, &master_data);
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if (pio > 1)
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control |= 1; /* Programmable timing on */
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if (drive->media != ide_disk)
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control |= 4; /* ATAPI */
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if (pio > 2)
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control |= 2; /* IORDY */
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if (is_slave) {
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master_data |= 0x4000;
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master_data &= ~0x0070;
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if (pio > 1)
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master_data = master_data | (control << 4);
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pci_read_config_byte(dev, slave_port, &slave_data);
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slave_data = slave_data & 0xf0;
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slave_data = slave_data | (timings[pio][0] << 2) | timings[pio][1];
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} else {
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master_data &= ~0x3307;
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if (pio > 1)
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master_data = master_data | control;
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master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
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}
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pci_write_config_word(dev, master_port, master_data);
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if (is_slave)
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pci_write_config_byte(dev, slave_port, slave_data);
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spin_unlock_irqrestore(&tune_lock, flags);
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}
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/**
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* it8213_tune_chipset - set controller timings
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* @drive: Drive to set up
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* @xferspeed: speed we want to achieve
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*
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* Tune the ITE chipset for the desired mode. If we can't achieve
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* the desired mode then tune for a lower one, but ultimately
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* make the thing work.
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*/
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static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = hwif->pci_dev;
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u8 maslave = 0x40;
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u8 speed = ide_rate_filter(drive, xferspeed);
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int a_speed = 3 << (drive->dn * 4);
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int u_flag = 1 << drive->dn;
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int v_flag = 0x01 << drive->dn;
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int w_flag = 0x10 << drive->dn;
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int u_speed = 0;
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u16 reg4042, reg4a;
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u8 reg48, reg54, reg55;
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pci_read_config_word(dev, maslave, ®4042);
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pci_read_config_byte(dev, 0x48, ®48);
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pci_read_config_word(dev, 0x4a, ®4a);
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pci_read_config_byte(dev, 0x54, ®54);
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pci_read_config_byte(dev, 0x55, ®55);
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switch(speed) {
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case XFER_UDMA_6:
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case XFER_UDMA_4:
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case XFER_UDMA_2: u_speed = 2 << (drive->dn * 4); break;
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case XFER_UDMA_5:
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case XFER_UDMA_3:
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case XFER_UDMA_1: u_speed = 1 << (drive->dn * 4); break;
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case XFER_UDMA_0: u_speed = 0 << (drive->dn * 4); break;
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break;
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case XFER_MW_DMA_2:
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case XFER_MW_DMA_1:
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case XFER_SW_DMA_2:
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break;
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case XFER_PIO_4:
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case XFER_PIO_3:
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case XFER_PIO_2:
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case XFER_PIO_1:
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case XFER_PIO_0:
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break;
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default:
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return -1;
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}
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if (speed >= XFER_UDMA_0) {
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if (!(reg48 & u_flag))
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pci_write_config_byte(dev, 0x48, reg48 | u_flag);
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if (speed >= XFER_UDMA_5) {
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pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag);
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} else {
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pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
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}
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if ((reg4a & a_speed) != u_speed)
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pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed);
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if (speed > XFER_UDMA_2) {
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if (!(reg54 & v_flag))
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pci_write_config_byte(dev, 0x54, reg54 | v_flag);
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} else
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pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
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} else {
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if (reg48 & u_flag)
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pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
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if (reg4a & a_speed)
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pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
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if (reg54 & v_flag)
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pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
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if (reg55 & w_flag)
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pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
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}
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it8213_tuneproc(drive, it8213_dma_2_pio(speed));
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return ide_config_drive_speed(drive, speed);
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}
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/**
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* it8213_configure_drive_for_dma - set up for DMA transfers
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* @drive: drive we are going to set up
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*
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* Set up the drive for DMA, tune the controller and drive as
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* required. If the drive isn't suitable for DMA or we hit
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* other problems then we will drop down to PIO and set up
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* PIO appropriately
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*/
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static int it8213_config_drive_for_dma (ide_drive_t *drive)
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{
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u8 pio;
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if (ide_tune_dma(drive))
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return 0;
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pio = ide_get_best_pio_mode(drive, 255, 4, NULL);
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it8213_tune_chipset(drive, XFER_PIO_0 + pio);
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return -1;
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}
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/**
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* init_hwif_it8213 - set up hwif structs
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* @hwif: interface to set up
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*
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* We do the basic set up of the interface structure. The IT8212
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* requires several custom handlers so we override the default
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* ide DMA handlers appropriately
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*/
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static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
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{
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u8 reg42h = 0;
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hwif->speedproc = &it8213_tune_chipset;
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hwif->tuneproc = &it8213_tuneproc;
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hwif->autodma = 0;
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hwif->drives[0].autotune = 1;
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hwif->drives[1].autotune = 1;
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if (!hwif->dma_base)
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return;
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hwif->atapi_dma = 1;
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hwif->ultra_mask = 0x7f;
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hwif->mwdma_mask = 0x06;
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hwif->swdma_mask = 0x04;
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pci_read_config_byte(hwif->pci_dev, 0x42, ®42h);
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hwif->ide_dma_check = &it8213_config_drive_for_dma;
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if (hwif->cbl != ATA_CBL_PATA40_SHORT)
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hwif->cbl = (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
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/*
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* The BIOS often doesn't set up DMA on this controller
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* so we always do it.
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*/
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if (!noautodma)
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hwif->autodma = 1;
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hwif->drives[0].autodma = hwif->autodma;
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hwif->drives[1].autodma = hwif->autodma;
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}
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#define DECLARE_ITE_DEV(name_str) \
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{ \
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.name = name_str, \
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.init_hwif = init_hwif_it8213, \
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.channels = 1, \
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.autodma = AUTODMA, \
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.enablebits = {{0x41,0x80,0x80}}, \
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.bootable = ON_BOARD, \
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}
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static ide_pci_device_t it8213_chipsets[] __devinitdata = {
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/* 0 */ DECLARE_ITE_DEV("IT8213"),
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};
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/**
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* it8213_init_one - pci layer discovery entry
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* @dev: PCI device
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* @id: ident table entry
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*
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* Called by the PCI code when it finds an ITE8213 controller. As
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* this device follows the standard interfaces we can use the
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* standard helper functions to do almost all the work for us.
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*/
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static int __devinit it8213_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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{
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ide_setup_pci_device(dev, &it8213_chipsets[id->driver_data]);
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return 0;
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}
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static struct pci_device_id it8213_pci_tbl[] = {
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{ PCI_VENDOR_ID_ITE, 0x8213, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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{ 0, },
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};
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MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);
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static struct pci_driver driver = {
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.name = "ITE8213_IDE",
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.id_table = it8213_pci_tbl,
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.probe = it8213_init_one,
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};
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static int __init it8213_ide_init(void)
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{
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return ide_pci_register_driver(&driver);
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}
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module_init(it8213_ide_init);
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MODULE_AUTHOR("Jack Lee, Alan Cox");
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MODULE_DESCRIPTION("PCI driver module for the ITE 8213");
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MODULE_LICENSE("GPL");
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