0ca5bc3de7
Patch from Lucas Correia Villa Real This patch adds support to GPIO on the S3C2400, which is going to be used by the GP32 machine and the SMDK2400 development board. Signed-off-by: Lucas Correia Villa Real <lucasvr@gobolinux.org> Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
120 lines
3.0 KiB
C
120 lines
3.0 KiB
C
/* linux/include/asm-arm/arch-s3c2410/hardware.h
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*
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* (c) 2003 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410 - hardware
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Changelog:
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* 21-May-2003 BJD Created file
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* 06-Jun-2003 BJD Added CPU frequency settings
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* 03-Sep-2003 BJD Linux v2.6 support
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* 12-Mar-2004 BJD Fixed include protection, fixed type of clock vars
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* 14-Sep-2004 BJD Added misccr and getpin to gpio
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* 01-Oct-2004 BJD Added the new gpio functions
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* 16-Oct-2004 BJD Removed the clock variables
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* 15-Jan-2006 LCVR Added s3c2400_gpio_getirq()
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*/
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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#ifndef __ASSEMBLY__
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/* external functions for GPIO support
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*
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* These allow various different clients to access the same GPIO
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* registers without conflicting. If your driver only owns the entire
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* GPIO register, then it is safe to ioremap/__raw_{read|write} to it.
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*/
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/* s3c2410_gpio_cfgpin
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*
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* set the configuration of the given pin to the value passed.
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*
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* eg:
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* s3c2410_gpio_cfgpin(S3C2410_GPA0, S3C2410_GPA0_ADDR0);
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* s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2410_GPE8_SDDAT1);
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*/
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extern void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function);
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extern unsigned int s3c2410_gpio_getcfg(unsigned int pin);
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/* s3c2410_gpio_getirq
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*
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* turn the given pin number into the corresponding IRQ number
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*
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* returns:
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* < 0 = no interrupt for this pin
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* >=0 = interrupt number for the pin
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*/
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extern int s3c2410_gpio_getirq(unsigned int pin);
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#ifdef CONFIG_CPU_S3C2400
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extern int s3c2400_gpio_getirq(unsigned int pin);
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#endif /* CONFIG_CPU_S3C2400 */
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/* s3c2410_gpio_irqfilter
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*
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* set the irq filtering on the given pin
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*
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* on = 0 => disable filtering
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* 1 => enable filtering
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*
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* config = S3C2410_EINTFLT_PCLK or S3C2410_EINTFLT_EXTCLK orred with
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* width of filter (0 through 63)
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*
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*
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*/
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extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,
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unsigned int config);
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/* s3c2410_gpio_pullup
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*
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* configure the pull-up control on the given pin
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*
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* to = 1 => disable the pull-up
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* 0 => enable the pull-up
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*
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* eg;
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*
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* s3c2410_gpio_pullup(S3C2410_GPB0, 0);
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* s3c2410_gpio_pullup(S3C2410_GPE8, 0);
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*/
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extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to);
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extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to);
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extern unsigned int s3c2410_gpio_getpin(unsigned int pin);
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extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg);
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#ifdef CONFIG_CPU_S3C2440
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extern int s3c2440_set_dsc(unsigned int pin, unsigned int value);
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#endif /* CONFIG_CPU_S3C2440 */
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#endif /* __ASSEMBLY__ */
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#include <asm/sizes.h>
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#include <asm/arch/map.h>
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/* machine specific hardware definitions should go after this */
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/* currently here until moved into config (todo) */
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#define CONFIG_NO_MULTIWORD_IO
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#endif /* __ASM_ARCH_HARDWARE_H */
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