b11c821532
This patch adds a binding that describes the Rockchip PCIe PHY found on Rockchip SoCs PCIe interface. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
32 lines
728 B
Plaintext
32 lines
728 B
Plaintext
Rockchip PCIE PHY
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-----------------------
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Required properties:
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- compatible: rockchip,rk3399-pcie-phy
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- #phy-cells: must be 0
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- clocks: Must contain an entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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- clock-names: Must be "refclk"
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- resets: Must contain an entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names: Must be "phy"
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Example:
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grf: syscon@ff770000 {
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compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
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#address-cells = <1>;
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#size-cells = <1>;
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...
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pcie_phy: pcie-phy {
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compatible = "rockchip,rk3399-pcie-phy";
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#phy-cells = <0>;
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clocks = <&cru SCLK_PCIEPHY_REF>;
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clock-names = "refclk";
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resets = <&cru SRST_PCIEPHY>;
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reset-names = "phy";
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};
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};
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