f1e58583b9
This patch enable support for cpu hotplug in RISC-V. It uses SBI HSM extension to online/offline any hart. As a result, the harts are returned to firmware once they are offline. If the harts are brought online afterwards, they re-enter Linux kernel as if a secondary hart booted for the first time. All booting requirements are honored during this process. Tested both on QEMU and HighFive Unleashed board with. Test result follows. --------------------------------------------------- Offline cpu 2 --------------------------------------------------- $ echo 0 > /sys/devices/system/cpu/cpu2/online [ 32.828684] CPU2: off $ cat /proc/cpuinfo processor : 0 hart : 0 isa : rv64imafdcsu mmu : sv48 processor : 1 hart : 1 isa : rv64imafdcsu mmu : sv48 processor : 3 hart : 3 isa : rv64imafdcsu mmu : sv48 processor : 4 hart : 4 isa : rv64imafdcsu mmu : sv48 processor : 5 hart : 5 isa : rv64imafdcsu mmu : sv48 processor : 6 hart : 6 isa : rv64imafdcsu mmu : sv48 processor : 7 hart : 7 isa : rv64imafdcsu mmu : sv48 --------------------------------------------------- online cpu 2 --------------------------------------------------- $ echo 1 > /sys/devices/system/cpu/cpu2/online $ cat /proc/cpuinfo processor : 0 hart : 0 isa : rv64imafdcsu mmu : sv48 processor : 1 hart : 1 isa : rv64imafdcsu mmu : sv48 processor : 2 hart : 2 isa : rv64imafdcsu mmu : sv48 processor : 3 hart : 3 isa : rv64imafdcsu mmu : sv48 processor : 4 hart : 4 isa : rv64imafdcsu mmu : sv48 processor : 5 hart : 5 isa : rv64imafdcsu mmu : sv48 processor : 6 hart : 6 isa : rv64imafdcsu mmu : sv48 processor : 7 hart : 7 isa : rv64imafdcsu mmu : sv48 Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
116 lines
2.3 KiB
C
116 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* HSM extension and cpu_ops implementation.
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*
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* Copyright (c) 2020 Western Digital Corporation or its affiliates.
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*/
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <asm/cpu_ops.h>
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#include <asm/sbi.h>
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#include <asm/smp.h>
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extern char secondary_start_sbi[];
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const struct cpu_operations cpu_ops_sbi;
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static int sbi_hsm_hart_start(unsigned long hartid, unsigned long saddr,
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unsigned long priv)
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{
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struct sbiret ret;
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ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_START,
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hartid, saddr, priv, 0, 0, 0);
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if (ret.error)
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return sbi_err_map_linux_errno(ret.error);
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else
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return 0;
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static int sbi_hsm_hart_stop(void)
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{
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struct sbiret ret;
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ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_STOP, 0, 0, 0, 0, 0, 0);
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if (ret.error)
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return sbi_err_map_linux_errno(ret.error);
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else
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return 0;
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}
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static int sbi_hsm_hart_get_status(unsigned long hartid)
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{
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struct sbiret ret;
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ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_STATUS,
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hartid, 0, 0, 0, 0, 0);
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if (ret.error)
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return sbi_err_map_linux_errno(ret.error);
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else
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return ret.value;
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}
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#endif
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static int sbi_cpu_start(unsigned int cpuid, struct task_struct *tidle)
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{
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int rc;
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unsigned long boot_addr = __pa_symbol(secondary_start_sbi);
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int hartid = cpuid_to_hartid_map(cpuid);
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cpu_update_secondary_bootdata(cpuid, tidle);
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rc = sbi_hsm_hart_start(hartid, boot_addr, 0);
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return rc;
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}
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static int sbi_cpu_prepare(unsigned int cpuid)
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{
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if (!cpu_ops_sbi.cpu_start) {
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pr_err("cpu start method not defined for CPU [%d]\n", cpuid);
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return -ENODEV;
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}
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return 0;
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static int sbi_cpu_disable(unsigned int cpuid)
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{
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if (!cpu_ops_sbi.cpu_stop)
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return -EOPNOTSUPP;
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return 0;
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}
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static void sbi_cpu_stop(void)
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{
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int ret;
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ret = sbi_hsm_hart_stop();
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pr_crit("Unable to stop the cpu %u (%d)\n", smp_processor_id(), ret);
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}
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static int sbi_cpu_is_stopped(unsigned int cpuid)
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{
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int rc;
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int hartid = cpuid_to_hartid_map(cpuid);
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rc = sbi_hsm_hart_get_status(hartid);
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if (rc == SBI_HSM_HART_STATUS_STOPPED)
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return 0;
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return rc;
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}
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#endif
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const struct cpu_operations cpu_ops_sbi = {
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.name = "sbi",
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.cpu_prepare = sbi_cpu_prepare,
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.cpu_start = sbi_cpu_start,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_disable = sbi_cpu_disable,
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.cpu_stop = sbi_cpu_stop,
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.cpu_is_stopped = sbi_cpu_is_stopped,
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#endif
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};
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