d9395d7200
Document all ARMv5, ARMv6, ARMv7 and ARMv8 NXP (i.MX, Layerscape) compatibles used in DTSes (even though driver binds only to fsl,imx21-wdt) to fix dtbs_check warnings like: arch/arm/boot/dts/imx53-qsb.dt.yaml: gpio@53fe0000: compatible: ['fsl,imx53-gpio', 'fsl,imx35-gpio'] is not valid under any of the given schemas Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
78 lines
1.7 KiB
YAML
78 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/watchdog/fsl-imx-wdt.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Freescale i.MX Watchdog Timer (WDT) Controller
|
|
|
|
maintainers:
|
|
- Anson Huang <Anson.Huang@nxp.com>
|
|
|
|
allOf:
|
|
- $ref: "watchdog.yaml#"
|
|
|
|
properties:
|
|
compatible:
|
|
oneOf:
|
|
- const: fsl,imx21-wdt
|
|
- items:
|
|
- enum:
|
|
- fsl,imx25-wdt
|
|
- fsl,imx27-wdt
|
|
- fsl,imx31-wdt
|
|
- fsl,imx35-wdt
|
|
- fsl,imx50-wdt
|
|
- fsl,imx51-wdt
|
|
- fsl,imx53-wdt
|
|
- fsl,imx6q-wdt
|
|
- fsl,imx6sl-wdt
|
|
- fsl,imx6sll-wdt
|
|
- fsl,imx6sx-wdt
|
|
- fsl,imx6ul-wdt
|
|
- fsl,imx7d-wdt
|
|
- fsl,imx8mm-wdt
|
|
- fsl,imx8mn-wdt
|
|
- fsl,imx8mp-wdt
|
|
- fsl,imx8mq-wdt
|
|
- fsl,ls1012a-wdt
|
|
- fsl,ls1043a-wdt
|
|
- fsl,vf610-wdt
|
|
- const: fsl,imx21-wdt
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
interrupts:
|
|
maxItems: 1
|
|
|
|
clocks:
|
|
maxItems: 1
|
|
|
|
fsl,ext-reset-output:
|
|
$ref: /schemas/types.yaml#/definitions/flag
|
|
description: |
|
|
If present, the watchdog device is configured to assert its
|
|
external reset (WDOG_B) instead of issuing a software reset.
|
|
|
|
required:
|
|
- compatible
|
|
- interrupts
|
|
- reg
|
|
|
|
unevaluatedProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
#include <dt-bindings/clock/imx6qdl-clock.h>
|
|
|
|
watchdog@20bc000 {
|
|
compatible = "fsl,imx21-wdt";
|
|
reg = <0x020bc000 0x4000>;
|
|
interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks IMX6QDL_CLK_IPG>;
|
|
};
|
|
|
|
...
|