Commit Graph

13 Commits

Author SHA1 Message Date
Laxman Dewangan
527fad1bc5 clk: tegra: initialise parent of uart clocks
Initialise the parent of UARTs to PLLP and disabling clock by
default.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 11:17:03 -07:00
Stephen Warren
0203d91247 clk: tegra: fix driver to match DT binding
enum tegra*_clk is intended to match the IDs listed in the Tegra clock
bindings. There are a few mismatches, which this patch fixes:

1) pll_s and cop were left out of the Tegra20 enum.

2) spdif_in and spdif_out were swapped relative to the Tegra30 binding.

3) i2cslow was misnamed as i2c_slow, and a duplicate i2cslow clock added
   to the Tegra30 enum.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
2013-02-13 11:17:02 -07:00
Peter De Schrijver
b4c154a339 clk: tegra: local arrays should be static
cclk_g_parents, cclk_lp_parents and sclk_parents are only accessed from within
clk-tegra30.c. Declare them static to avoid namespace polution.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-12 10:29:13 -07:00
Peter De Schrijver
d076a206b2 clk: tegra: Add missing spinlock for hclk and pclk
The hclk and pclk clocks are controlled by the same register. Hence a lock is
required to avoid corruption.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-12 10:29:13 -07:00
Peter De Schrijver
c64c65d494 clk: tegra: Implement locking for super clock
Although tegra_clk_register_super_mux() has a lock parameter, the lock is not
actually used by the code. Fixed with this patch.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-12 10:29:12 -07:00
Joseph Lo
22ca335f6d clk: tegra: fix wrong clock index between se to sata_cold
The index of se should be 127. And the previous clock index was 125. So
we need to set up the index for se to get the correct index between se
to sata_cold.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-12 10:29:12 -07:00
Joseph Lo
4a2e32794e clk: tegra20: Implementing CPU low-power function for tegra_cpu_car_ops
Implementing suspend, resume and rail_off_ready API for tegra_cpu_car_ops. These
functions were used for CPU powered-down state maintenance.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:20:38 -07:00
Prashant Gaikwad
ef3ffe5a04 clk: tegra30: remove unused TEGRA_CLK_DUPLICATE()s
With device tree support added for Tegra clocks look up is done from
device tree, remove unused TEGRA_CLK_DUPLICATE()s.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:34 -07:00
Prashant Gaikwad
e5dd263022 clk: tegra20: remove unused TEGRA_CLK_DUPLICATE()s
With device tree support added for Tegra clocks look up is done from
device tree, remove unused TEGRA_CLK_DUPLICATE()s.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:34 -07:00
Prashant Gaikwad
61fd290d21 ARM: tegra: migrate to new clock code
Migrate Tegra clock support to drivers/clk/tegra, this involves
moving:
1. definition of tegra_cpu_car_ops to clk.c
2. definition of reset functions to clk-peripheral.c
3. change parent of cpu clock.
4. Remove legacy clock initialization.
5. Initialize clocks using DT.
6. Remove all instance of mach/clk.h

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: use to_clk_periph_gate().]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:07 -07:00
Prashant Gaikwad
b08e8c0ecc clk: tegra: add clock support for Tegra30
Add Tegra30 clock support based on common clock framework.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: ensure all OF lookups return valid cookies i.e. an explicit
error pointer or valid pointer not NULL, adapt to renames in earlier
patches, fixed some checkpatch issues.]
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:07 -07:00
Prashant Gaikwad
37c26a9065 clk: tegra: add clock support for Tegra20
Add Tegra20 clock support based on common clock framework.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: s/1GHz/100MHz/ in call to tegra_clk_plle() to fix PCIe,
implemented KBC clock, ensure all OF lookups return valid cookies i.e.
an explicit error pointer or valid pointer not NULL, adapt to renames
in earlier patches, fixed some checkpatch issues.]
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:07 -07:00
Prashant Gaikwad
8f8f484bf3 clk: tegra: add Tegra specific clocks
Add Tegra specific clocks, pll, pll_out, peripheral, frac_divider, super.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: alloc sizeof(*foo) not sizeof(struct foo), add comments re:
storing pointers to stack variables, make a timeout loop more idiomatic,
use _clk_pll_disable() not clk_disable_pll() from _program_pll() to
avoid redundant lock operations, unified tegra_clk_periph() and
tegra_clk_periph_nodiv(), unified tegra_clk_pll{,e}, rename all clock
registration functions so they don't have the same name as the clock
structs, return -EINVAL from clk_plle_enable when matching table rate
not found, pass ops to _tegra_clk_register_pll rather than a bool.]
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:07 -07:00