Commit Graph

14 Commits

Author SHA1 Message Date
Paul Gortmaker
cb5485a0b9 powerpc/85xx: sbc8548 - fixup of PCI-e related DTS fields
The PCI-e addressing was originally patterned of the MPC8548CDS
which has PCI1, PCI2, and PCI-e.  Since this board only has
PCI1 and PCI-e, it makes more sense to be similar to the MPC8568MDS
board.  This does that by cutting the PCI/PCI-e I/O sizes from
16MB to 8MB and pulling the PCI-e I/O range back to 0xe280_0000
(the hole where PCI2 I/O would have been).

This also fixes a typo where an extra zero made an 8MB range a 128MB
range, removes the hole left by PCI2 from the aliases, and sets the
clocks to match the oscillators that are actually on the board.

With accompanying u-boot updates, PCI-e has been validated with
both a sky2 card (1148:9e00) and an e1000 card (8086:108b).

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-11-05 07:16:54 -06:00
Kumar Gala
b1b6802586 powerpc/fsl: Removed reg property from 85xx/86xx soc node
Between the addition of the ecm/mcm law nodes and the fact that the
get_immrbase() has been using the range property of the SoC to determine
the base address of CCSR space we no longer need the reg property at
the soc node level.  It has been ill specified and varied between device
trees to cover either the {e,m}cm-law node, some odd subset of CCSR
space or all of CCSR space.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-19 00:50:29 -05:00
Kumar Gala
e1a2289736 powerpc/85xx: Add new LAW & ECM device tree nodes for all 85xx systems
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-19 00:46:19 -05:00
Kumar Gala
28eac2b74c powerpc/fsl: Remove cell-index from PCI nodes
The cell-index property isn't used on PCI nodes and is ill defined.
Remove it for now and if someone comes up with a good reason and
consistent definition for it we can add it back

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-19 00:46:14 -05:00
Kumar Gala
fe671772ab powerpc/85xx: Use fsl,mpc85.. as prefix for memory ctrl & l2-cache nodes
Older devices tree's used "fsl,85.." instead of the preferred
"fsl,mpc85.." for the memory controller & l2 cache controller nodes.
The EDAC code is the only use of these and has been updated for some
time to support both "fsl,85.." and "fsl,mpc85.."

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-31 08:46:25 -05:00
Anton Vorontsov
84ba4a5899 powerpc/85xx: Move gianfar mdio nodes under the ethernet nodes
Currently it doesn't matter where the mdio nodes are placed, but with
power management support (i.e. when sleep = <> properties will take
effect), mdio nodes placement will become important: mdio controller
is a part of the ethernet block, so the mdio nodes should be placed
correctly. Otherwise we may wrongly assume that MDIO controllers are
available during sleep.

Suggested-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-24 08:35:13 -05:00
Andy Fleming
b31a1d8b41 gianfar: Convert gianfar to an of_platform_driver
Does the same for the accompanying MDIO driver, and then modifies the TBI
configuration method.  The old way used fields in einfo, which no longer
exists.  The new way is to create an MDIO device-tree node for each instance
of gianfar, and create a tbi-handle property to associate ethernet controllers
with the TBI PHYs they are connected to.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-12-16 15:29:15 -08:00
Kim Phillips
3fd44736db powerpc/fsl: update crypto node definition and device tree instances
delete obsolete device-type property, delete model property
(use compatible property instead), prepend "fsl," to Freescale
specific properties. Add nodes to device trees that are missing them,
and fix broken property values in other trees.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14 07:55:47 -05:00
Kumar Gala
dee805532a powerpc: Add dma nodes to 83xx, 85xx and 86xx boards
Added DMA nodes for the elo/elo-plus DMA engines.

Renamed the interrupt controller alias in mpc832x_rdb.dts to ipic so that
its the same as all the other boards.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-27 16:04:29 -05:00
Kumar Gala
c054065bc1 [POWERPC] 85xx: Add next-level-cache property
Added next-level-cache to the L1 and a reference to the new L2 label.
This is per the ePAPR 0.94 spec.  Since we are't really dependent on this
today we aren't supporting the "legacy" l2-cache phandle that is specified
in the PPC v2.1 OF Binding spec.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-02 14:44:25 -05:00
Kumar Gala
acd4b715ec [POWERPC] Cleanup mpic nodes in .dts
Removed clock-frequency, big-endian, and built-in props as they aren't
specified anywhere.  Also added compatible = "chrp,open-pic" in the
places it was missing.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-02 14:44:25 -05:00
Jeremy McNicoll
bfd123bf91 [POWERPC] 85xx: SBC8548 - Add flash support and HW Rev reporting
The following adds local bus, flash and MTD partition nodes for
sbc8548. As well, a compatible field for the soc node, so that
of_platform_bus_probe() will pick it up.

Something that is provided through this newly added epld node
is the Hardware Revision which is now being utilized.

Signed-off-by: Jeremy McNicoll <jeremy.mcnicoll@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-05-13 08:53:48 -05:00
Jeremy McNicoll
3e0d65bf6d [POWERPC] 85xx: sbc8548 - Fix incorrect PCI-X and PCI interrupt map
The following patch allows interrupts to occur on the
sbc8548. Currently PCI and PCI-X devices get assigned an IRQ
but the interrupt count never increases.  This solves the
problem and adds PCI support as well.

Signed-off-by: Jeremy McNicoll <jeremy.mcnicoll@windriver.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-07 16:47:52 -06:00
Paul Gortmaker
30340998fa [POWERPC] 85xx: Add v1 device tree source for Wind River SBC8548 board
This adds a v1 device tree source for the Wind River SBC8548 board.
The biggest difference between this and the MPC8548CDS reference
platform is the absence of the CDS's Arcadia peripherals and physical
access to the PCI#2 bus.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-28 08:30:52 -06:00