This will configure the platform data for the PL011, PL022
and PL180 (derivate) PrimeCells found in the Ux500 to use DMA
with the generic DMA engine for DMA40.
Signed-off-by: Per Forlin <per.forlin@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This will configure the platform data for the PL180, PL011 and
PL022 PrimeCells found in the U300 to use DMA with the generic
PrimeCell DMA engine for COH 901 318.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The mmci driver can handle a GPIO pin for card detect, using
IRQs and all just fine, so switch to using that. Delete the
old bogus input device hack, if userspace need to detect
MMC cards it should use udev like everyone else.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- DMA tx and rx maps for usb channels are set to be configured at
runtime
- MUSB is enabled with soc specific base address, irq and dma
configurations
Signed-off-by: Mian Yousaf Kaukab <mian-yousaf.kaukab@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- DMA tx and rx maps for usb channels are set to be configured at
runtime
- GPIO configurations for usb are added
- MUSB is enabled with soc specific base address, irq and dma
configurations
Signed-off-by: Mian Yousaf Kaukab <mian-yousaf.kaukab@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
MUSB driver has been updated to separate out BSP layer
from its generic parts, as separate driver. This patch
configures the clock with the new platform driver name.
Signed-off-by: Mian Yousaf Kaukab <mian-yousaf.kaukab@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
USB resources and DMA40 configurations are dynamically with
the data provided in ux500_add_usb() call. Though only DMA40
configurations differ between U8500 and U5500 (USB resource
are common between them).
Signed-off-by: Mian Yousaf Kaukab <mian-yousaf.kaukab@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The levelshifter pins were set to inverted values, fix this up.
Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The clock speed for the SD/MMC clock was incorrect, rectify it.
Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Proximity sensor is managed as an input event (SW_PROXIMITY).
Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>
[Named GPIO pin]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The U8500 UIB contains a Synaptics RMI touchpanel and
a matrix keyboard via the TC35893 port expander device.
Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The ST-UIB contains a matrix keypad interfaced with the
STMPE1601 port expander and a ROHM BU2101 touch panel.
Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add support for dynamic detection of the UIB used (at the cost of one i2c error
on the lesser-used UIB) and also provide an override via a command line
parameter if needed.
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Include ab8500 regulators for DB8500 SoC by default
and fix build issues
Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com>
[Small fixup for changed boardfiles]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Try to make the regulators a little bit more useful by adding some
of the most basic consumers we're going to have in the end.
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Rabin Vincent <rabin@rab.in>
Cc: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Cc: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
Cc: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the PMU resources necessary to get perf working with
the DB5500 ASIC.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There are two dividers used to derive bus clock from system clock:
system clock is divided by SCKDIV+1, then by BCKDIV+1. SCKDIV divider
has been ignored up to now, which is no problem as long as it is 0.
Take SCKDIV into account for bus clock calculation.
Signed-off-by: Oskar Schirmer <oskar@linutronix.de>
Cc: bigeasy@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Remove double definition of ACLKUSBH, change parameter name in
root_clk_disable, as there is no reason to have a different name than
in root_clk_enable.
No functional change.
Signed-off-by: Oskar Schirmer <oskar@linutronix.de>
Cc: bigeasy@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
There is no reason why in case of PLL2 the configuration register
should be read twice, while for PLL0/1 using the value previously read
is used. Do the same for PLL2.
Signed-off-by: Oskar Schirmer <oskar@linutronix.de>
Cc: bigeasy@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
The calculation of the best divider value for a requested clock rate
always returned a value that was slightly too large. It was also not
protected against possible divisions by zero.
Request for very low, but non zero rates would cause the ACLK divisor
field to overflow. Catch this situation by using the maximum value.
The internal function aclk_set_rate() calculates the correct divider
value, but doesn't write it back to the register. Add the write back.
Signed-off-by: Hans J. Koch <hjk@linutronix.de>
Signed-off-by: Oskar Schirmer <oskar@linutronix.de>
Cc: bigeasy@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
The evaluation board is driven with 1.2V core voltage, so system clock
must not exceed 192 MHz, bus clock must not exceed 110 MHz. Choose
appropriate values and set DTCMWAIT accordingly. Adapt UART setting to
avoid console log interruption and wait for the specified locking time
of 300us to pass.
Signed-off-by: Oskar Schirmer <oskar@linutronix.de>
Cc: bigeasy@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
If NAND is enabled we better have the include around.
Signed-off-by: Oskar Schirmer <oskar@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Some cards have the CRC errors in read on mx51 BBG board.
Configure the eSDHC pad configurations to level up the
compatibility to fix this issue.
Signed-off-by: Richard Zhu <Hong-Xing.Zhu@freescale.com>
Tested-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Most likely, the LCD panel on mx28 platform will require a pixel
clock higher than ref_xtal_clk (24 MHz), so the patch initializes
the parent of lcdif clock as ref_pix_clk.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This typo was fixed in 46e3f30 (mx25: fix spi device registration typo), but a
the merge at 0e44e059 (Merge commit 'v2.6.37-rc4' into imx-for-2.6.38) resolved
the merge conflict wrongly.
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: S3C64XX: Update regulator names for debugfs compatiblity on SMDK6410
ARM: S3C64XX: Fix build with WM1190 disabled and WM1192 enabled on SMDK6410
ARM: S3C64XX: Reduce output of s3c64xx_dma_init1()
ARM: S3C64XX: Tone down SDHCI debugging
ARM: S3C64XX: Add clock for i2c1
ARM: S3C64XX: Staticise non-exported GPIO to interrupt functions
ARM: SAMSUNG: Include devs.h in dev-uart.c to prototype devices
ARM: S3C64XX: Fix keypad setup to configure correct number of rows
ARM: S3C2440: Fix usage gpio bank j pin definitions on GTA02
ARM: S5P64X0: Fix number of GPIO lines in Bank F
ARM: S3C2440: Select missing S3C_DEV_USB_HOST on GTA02
This patch is to add pad control helper macro to make the code easy
to read. The need is being seen when adding pad definitions for
LCDIF which gets ~30 pads to define.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fixes:
arch/arm/kernel/built-in.o: In function `__irq_svc':
io.c:(.text+0x2e0): undefined reference to `avic_base'
arch/arm/kernel/built-in.o: In function `__irq_usr':
io.c:(.text+0x4c8): undefined reference to `avic_base'
arch/arm/mach-mxc91231/built-in.o: In function `mxc91231_init_irq':
magx-zn5.c:(.init.text+0x18): undefined reference to `mxc_init_irq'
and was broken by
c7259df (ARM i.MX irq: Compile avic irq code only on SoCs that need it)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
