Commit Graph

177 Commits

Author SHA1 Message Date
Linus Torvalds
60d9aa758c Merge git://git.infradead.org/mtd-2.6
* git://git.infradead.org/mtd-2.6: (90 commits)
  jffs2: Fix long-standing bug with symlink garbage collection.
  mtd: OneNAND: Fix test of unsigned in onenand_otp_walk()
  mtd: cfi_cmdset_0002, fix lock imbalance
  Revert "mtd: move mxcnd_remove to .exit.text"
  mtd: m25p80: add support for Macronix MX25L4005A
  kmsg_dump: fix build for CONFIG_PRINTK=n
  mtd: nandsim: add support for 4KiB pages
  mtd: mtdoops: refactor as a kmsg_dumper
  mtd: mtdoops: make record size configurable
  mtd: mtdoops: limit the maximum mtd partition size
  mtd: mtdoops: keep track of used/unused pages in an array
  mtd: mtdoops: several minor cleanups
  core: Add kernel message dumper to call on oopses and panics
  mtd: add ARM pismo support
  mtd: pxa3xx_nand: Fix PIO data transfer
  mtd: nand: fix multi-chip suspend problem
  mtd: add support for switching old SST chips into QRY mode
  mtd: fix M29W800D dev_id and uaddr
  mtd: don't use PF_MEMALLOC
  mtd: Add bad block table overrides to Davinci NAND driver
  ...

Fixed up conflicts (mostly trivial) in
	drivers/mtd/devices/m25p80.c
	drivers/mtd/maps/pcmciamtd.c
	drivers/mtd/nand/pxa3xx_nand.c
	kernel/printk.c
2009-12-16 10:23:43 -08:00
Jiri Slaby
caf0e8e028 mtd: cfi_cmdset_0002, fix lock imbalance
Stanse found a double unlock in get_chip. get_chip is called with
chip->mutex held and caller is responsible for unlocking it too.

Do not unlock the lock in get_chip on a fail path. This would mean
a double unlock.

Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-12-10 13:33:53 +00:00
Guillaume LECERF
4a58948669 mtd: add support for switching old SST chips into QRY mode
SST 39VF160x/39VF320x and some old SST chips need a special command
sequence to enter CFI QueRY mode [1].
This patch adds the relevant sequence to cfi_qry_mode_on().
Tested with 39VF3201.

Signed-off-by: Guillaume LECERF <glecerf@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-11-30 11:39:21 +00:00
Ladislav Michl
db5432db81 mtd: fix M29W800D dev_id and uaddr
This one sits in my tree for more than two years...
Using device code found on page 12 (http://www.btdesigner.com/pdfs/M29W800D.pdf)
and unlock address from page 15 MTD subsytem happily detects ST M29W800DB
in 16-bit mode. I do believe original author used only 8-bit mode and thus
didn't hit this bug.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-11-30 11:38:32 +00:00
Joakim Tjernlund
2695eab964 mtd: CFI cmdset_0002: enable erase-suspend-program
Erase-suspend for writing is required to avoid blocking applications
that wish to write some data (to a NOR block other than the one being
erased). Particularly, it solves some huge delays that an application
(which writes to a UBIFS) will experience if UBI attaches to empty NOR
flash. In this case the UBI background thread will erase a lot of blocks
and the application can be blocked for minutes because of the "MTD/CFI
chip lock".

This feature has been disabled for years. Maybe this was because the old
code turned it on for erase-suspend read-only chips also
(cfip->EraseSuspend & 0x1). This is wrong and corrected now.

This patch was tweaked by Norbert van Bolhuis.

Signed-off-by: Norbert van Bolhuis <nvbolhuis@aimvalley.nl>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-11-30 09:58:53 +00:00
Hans-Christian Egtvedt
b2ef1a2bb2 mtd: move manufacturer to the common cfi.h header file
This patch moves the MANUFACTURER_ST and MANUFACTURER_INTEL to the
include/linux/mtd/cfi.h header file and renames them to CFI_MFR_ST and
CFI_MFR_INTEL. CFI_MFR_ST was already present there.

All references in drivers/mtd/chips/cfi_cmdset_0001.c are updated to reflect
this.

Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-11-30 09:51:26 +00:00
Hans-Christian Egtvedt
8dbaea4bfc mtd: add lock fixup for AT49BV640D and AT49BV640DT chips
This patch sets the MTD_POWERUP_LOCK flag for AT49BV640D and AT49BV640DT
devices, since the devices are locked when powered up and needs to be unlocked
before interfaced.

Quote datasheet; "At power-up and reset, all sectors have their Softlock
protection mode enabled.".

Tested on AVR32 hardware platform with an AT49BV640D flash device.

Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-11-30 09:51:01 +00:00
Nicolas Pitre
c9f7ec3084 mtd: add missing put_chip() in cfi_intelext_reset()
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-11-30 09:44:07 +00:00
Michael Roth
fa3012318b Kconfig: Remove useless and sometimes wrong comments
Additionally, some excessive newlines removed.

Signed-off-by: Michael Roth <mroth@nessie.de>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2009-11-09 09:40:56 +01:00
Mike Frysinger
e1070211f7 mtd: jedec_probe: add PSD4256G6V id
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-09-23 00:07:00 -07:00
David Woodhouse
6469f540ea Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
	drivers/mtd/mtdcore.c

Merged in order that I can apply the Nomadik nand/onenand support patches.
2009-09-20 05:55:36 -07:00
Massimo Cirillo
23af51ecfb mtd: cfi_cmdset_0002: add 0xFF intolerance for M29W128G
The M29W128G Numonyx flash devices are intolerant to any 0xFF command:
in the Cfi_util.c the function cfi_qry_mode_off() (that resets the device
after the autoselect mode) must have a 0xF0 command after the 0xFF command.
This fix solves also the cause of the fixup_M29W128G_write_buffer() fix,
that can be removed now.
The following patch applies to 2.6.30 kernel.

Signed-off-by: Massimo Cirillo <maxcir@gmail.com>
Acked-by: Alexey Korolev <akorolev@infradead.org>
Cc: stable@kernel.org
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-09-19 14:18:43 -07:00
Stefan Roese
b4c8c8cf9a mtd: jedec: fix compilation problem with I28F640C3B definition
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-09-19 14:16:01 -07:00
Hiroshi Ito
9aff1b1afe mtd: jedec_probe: fix NEC uPD29F064115 detection
linux v2.6.31-rc6 can not detect NEC uPD29F064115.

uPD29F064115 is a 16 bit device.
datasheet:
  http://www.cn.necel.com/memory/cn/download/M16062EJ2V0DS00.pdf

This applies the same fix as used for SST chips in commit 
ca6f12c67e ("jedec_probe: Fix SST 16-bit 
chip detection").

Signed-off-by: Hiroshi Ito <ito@mlb.co.jp>
Cc: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-09-19 11:25:56 -07:00
Nicolas Pitre
2f82af08fc Nicolas Pitre has a new email address
Due to problems at cam.org, my nico@cam.org email address is no longer
valid.  FRom now on, nico@fluxnic.net should be used instead.

Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-09-15 09:37:12 -07:00
Daniel Ribeiro
e1b158abc5 mtd: CFI 1.0 and CFI 1.1
This patch allows otpinfo for CFI >= 1.0 and burst read for CFI >= 1.1.

references:
1.0:	http://www.datasheetcatalog.org/datasheets2/81/816884_1.pdf

1.1:	http://milkymist.org/doc/MT28F640J3.pdf
	http://www.delorie.com/agenda/specs/29066709.pdf

Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Acked-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-06-05 17:55:10 +01:00
Daniel Ribeiro
ec2d0d8425 mtd: CFI: quirk for PF38F4476.
This chip reports CFI 1.3, but the CFI PRI is like CFI 1.1. Add a quirk
to pass probe on this chip.

This patch depends on "MTD: CFI 1.0 and CFI 1.1"

Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Acked-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-06-05 17:51:07 +01:00
Michał Mirosław
a0645ce9ba mtd: add SST39SF040 chip to jedec_probe
Add SST39SF040 chip (like SST39SF020A but bigger - 4Mbit).

Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-06-05 17:50:29 +01:00
Darius Augulis
504a3e7220 [MTD] [NOR] Fixup for Numonyx M29W128 chips
Prevent NUMONYX M29W128G memories from using write buffer,
because it doesn't work properly.

Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-04-06 07:23:26 -07:00
David Howells
402d326519 NOMMU: Present backing device capabilities for MTD chardevs
Present backing device capabilities for MTD character device files to allow
NOMMU mmap to do direct mapping where possible.

Signed-off-by: David Howells <dhowells@redhat.com>
Tested-by: Bernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-03-24 09:00:19 +00:00
Yegor Yefremov
bd50a0ffca [MTD] [CHIPS] Add JEDEC probe support for the SST 39VF3201 flash chip
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-03-20 18:50:26 +00:00
Graff Yang
6ac15e92df [MTD] [CHIPS] cfi_cmdset_0001.c: Fix a bug in inval_cache_and_wait_for_operation().
If the inval_cache_and_wait_for_operation() is re-entered by write operation when erase
operation is in progress, the chip->erase_suspended will be cleared, this cause the erase
timeo is not reset and will result time out error for erase.

Signed-off-by: Graff Yang <graff.yang@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-03-20 18:32:17 +00:00
Alan Cox
5f877607cd [MTD] map_rom has NULL erase pointer
Which means if inftl or similar are loaded with it (which is a dumb thing
to do admittedly) it may oops.

Closes #8108

[dwmw2: change error to -EROFS to match write-protected flash]
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-01-11 19:56:46 +00:00
Wolfgang Grandegger
fefae48bf8 [MTD] CFI: remove major/minor version check for command set 0x0002
The NOR Flash memory K8P2815UQB from Samsung uses the major version
number '0'. Add a quirk to cope with it.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-01-09 12:16:28 +00:00
Adrian Hunter
69423d99fc [MTD] update internal API to support 64-bit device size
MTD internal API presently uses 32-bit values to represent
device size.  This patch updates them to 64-bits but leaves
the external API unchanged.  Extending the external API
is a separate issue for several reasons.  First, no one
needs it at the moment.  Secondly, whether the implementation
is done with IOCTLs, sysfs or both is still debated.  Thirdly
external API changes require the internal API to be accepted
first.

Note that although the MTD API will be able to support 64-bit
device sizes, existing drivers do not and are not required
to do so, although NAND base has been updated.

In general, changing from 32-bit to 64-bit values cause little
or no changes to the majority of the code with the following
exceptions:
    	- printk message formats
    	- division and modulus of 64-bit values
    	- NAND base support
	- 32-bit local variables used by mtdpart and mtdconcat
	- naughtily assuming one structure maps to another
	in MEMERASE ioctl

Signed-off-by: Adrian Hunter <ext-adrian.hunter@nokia.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-12-10 13:37:21 +00:00
Eric W. Biederman
467622ef2a [MTD] [NOR] Fix cfi_send_gen_cmd handling of x16 devices in x8 mode (v4)
For "unlock" cycles to 16bit devices in 8bit compatibility mode we need
to use the byte addresses 0xaaa and 0x555. These effectively match
the word address 0x555 and 0x2aa, except the latter has its low bit set.

Most chips don't care about the value of the 'A-1' pin in x8 mode,
but some -- like the ST M29W320D -- do. So we need to be careful to
set it where appropriate.

cfi_send_gen_cmd is only ever passed addresses where the low byte
is 0x00, 0x55 or 0xaa. Of those, only addresses ending 0xaa are
affected by this patch, by masking in the extra low bit when the device
is known to be in compatibility mode.

[dwmw2: Do it only when (cmd_ofs & 0xff) == 0xaa]
v4: Fix  stupid typo in cfi_build_cmd_addr that failed to compile
    I'm writing this patch way to late at night.
v3: Bring all of the work back into cfi_build_cmd_addr
    including calling of map_bankwidth(map) and cfi_interleave(cfi)
    So every caller doesn't need to.
v2: Only modified the address if we our device_type is larger than our
    bus width.

Cc: stable@kernel.org
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-11-05 14:40:25 +01:00
Haavard Skinnemoen
be8f78b8e8 [MTD] [NOR] AT49BV6416 has swapped erase regions
The CFI information read from AT49BV6416 lists the erase regions in the
wrong order, causing problems when trying to erase or update the first
or last 64KiB block.

Work around this by inverting the "top boot" flag, which will
effectively reverse the order of the erase regions.

This chip is obsolete, but it's used in some existing designs.

Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-10-18 12:53:15 +01:00
Christopher Moore
87e92c062b [MTD] cfi_cmdset_0002.c: Add Macronix CFI V1.0 TopBottom detection
This patch adds TopBottom detection for most Macronix chips with CFI V1.0.

The main purpose of this patch is to add detection of the MX29LV400C B
used on the LaCie Ethernet Disk mini V2 NAS.

It detects the following parts correctly:-
MX28F640C3B T
MX29LV002C  B
MX29LV002NC B
MX29LV004C  T
MX29LV400C  T/B
MX29LV800C  T/B
MX29LV160C  T/B
MX29SL800C  T/B
MX29SL802C  T/B

It detects the following uniform part as bottom but it should work
correctly:-
MX29LV040C

For T parts it causes the erase block table to be reversed correctly.
For other parts it avoids the bogus "Assuming top" message.

It does not detect the following correctly:-
MX28F640C3B B
MX29LV002C  T
MX29LV002NC T
MX29LV004C  B
MX29SL400C  T/B
MX29SL402C  T/B

If desired I could supply a more complicated patch to handle these as
well.

Only the MX29LV400C B has been physically tested; others were checked
against their data sheets.

Signed-off-by: Christopher Moore <moore@free.fr>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-10-18 12:41:51 +01:00
Alexander Belyakov
3afe7eb37f [MTD] [NOR] fix cfi_cmdset_0001 FL_SYNCING race (take 2)
The patch fixes CFI issue with multipartitional devices leading to the 
set of errors or even deadlock. The problem is CFI FL_SYNCING state race 
with flash operations (e.g. erase suspend). It is reproduced by running 
intensive writes on one JFFS2 partition and simultaneously performing 
mount/unmount cycle on another partition of the same chip.

Signed-off-by: Alexander Belyakov <abelyako@googlemail.com>
Acked-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-09-26 18:56:18 -06:00
David Woodhouse
5e706469a0 [MTD] [NOR] Select MTD_CFI_UTIL when MTD_CFI probe routine is enabled
It requires cfi_qry_mode_on(), which is in cfi_util.c

Reported by Russell King

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-09-01 12:23:22 +01:00
David Woodhouse
c314dfdc35 [MTD] [NOR] Rename and export new cfi_qry_*() functions
They need to be exported, so let's give them less generic-sounding names
while we're at it.

Original export patch, along with the suggestion about the nomenclature,
from Stephen Rothwell.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-08-07 11:55:07 +01:00
Anders Grafström
e93cafe45f [MTD] [NOR] cfi_cmdset_0001: Timeouts for erase, write and unlock operations
Timeouts are currently given by the typical operation time times 8.
It works in the general well-behaved case but not when an erase block is
failing. For erase operations, it seems that a failing erase block will
keep the device state machine in erasing state until the vendor
specified maximum timeout period has passed. By this time the driver
would have long since timed out, left erasing state and attempted
further operations which all fail. This patch implements timeouts using
values from the CFI Query structure when available.
The patch also sets a longer timeout for locking operations. The current
value used for locking/unlocking given by 1000000/HZ microseconds is too
short for devices like J3 and J5 Strataflash which have a typical clear
lock-bits time of 0.5 seconds.

Signed-off-by: Anders Grafström <grfstrm@users.sourceforge.net>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-08-06 09:44:54 +01:00
Alexey Korolev
2e489e077a [MTD] [NOR] Add qry_mode_on()/qry_omde_off() to deal with odd chips
There are some CFI chips which require non standard procedures to get 
into QRY mode. The possible way to support them would be trying 
different modes till QRY will be read. This patch introduce two new 
functions qry_mode_on qry_mode_off. qry_mode_on tries different commands 
in order switch chip into QRY mode.

So if we have one more "odd" chip - we just could add several lines to 
qry_mode_on. Also using these functions remove unnecessary code 
duplicaton in porbe procedure.

Currently there are two "odd" cases
1. Some old intel chips which require 0xFF before 0x98
2. ST M29DW chip which requires 0x98 to be sent at 0x555 (according to
CFI should be 0x55)

This patch is partialy based on the patch from Uwe
(see "[PATCH 2/4] [RFC][MTD] cfi_probe: remove Intel chip workaround"
thread )

Signed-off-by: Alexey Korolev <akorolev@infradead.org>
Signed-off-by: Alexander Belyakov <abelyako@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-08-06 09:43:58 +01:00
George G. Davis
a0e7229edb [MTD] [NOR] Add "Spansion" to MTD_CFI_AMDSTD kconfig menu description
This long overdue trivial change to the MTD_CFI_AMDSTD kconfig menu
description is intended to help clarify that this option also supports
Spansion flash devices.

Signed-off-by: George G. Davis <gdavis@mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-08-06 09:41:35 +01:00
Julia Lawall
c8872b069c [MTD] Use DIV_ROUND_UP
The kernel.h macro DIV_ROUND_UP performs the computation (((n) + (d) - 1) /
(d)) but is perhaps more readable.

Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-08-02 18:45:18 +01:00
David Brownell
34a82443b7 [MTD] dataflash OTP support
Now that we can tell when we have one of the newer DataFlash chips,
optionally expose the 128 bytes of OTP memory they provide.  Tested
on at45db642 revision B and D chips.

Switch mtdchar over to a generic HAVE_MTD_OTP flag instead of adding
another #ifdef for each type of chip whose driver has OTP support.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: Bryan Wu <cooloney@kernel.org>
Cc: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-08-01 21:47:47 +01:00
Jerry Hicks
4a22442fae [MTD] [NOR] drivers/mtd/chips/jedec_probe.c: fix Am29DL800BB device ID
The device id for Am29DL800BB in jedec_probe.c is wrong.

Reference: http://www.spansion.com/datasheets/21519c4.pdf

I discovered this while working with u-boot.

The u-boot folks mentioned Linux as an upstream reference, thought I'd
post a heads-up here too.

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-07-31 08:34:46 +01:00
Atsushi Nemoto
ca6f12c67e [MTD] jedec_probe: Fix SST 16-bit chip detection
The unlock_addr rework in kernel 2.6.25 breaks 16-bit SST chips.  SST
39LF160 and SST 39VF1601 are both 16-bit only chip (do not have BYTE#
pin) and new uaddr value is not correct for them.  Add
MTD_UADDR_0xAAAA_0x5555 for those chips.  Tested with SST 39VF1601
chip.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-07-25 10:02:47 -04:00
Alexey Korolev
998453fbf2 [MTD] [NOR] Fix -ETIMEO errors in CFI driver
Existing CFI driver has problems with excessive writes during erase.
If CFI driver does many writes during one erase cycle we may face the
messages with -ETIMEO error on erase operation.  It may cause the
following data corruption and kernel panics.

The reason of the issue is related to specifics of suspend operation:
if we write to flash during erase, suspend operation will cost some time
to erase procedure (for P30 it could be significant). In current version of
cfi driver the problem of many suspends is partially workarounded by adding
some time reserv to any operation (8xerase_time) but if we have many writes
during one erase the problem appears.

This patch detects the suspend and resets timer if suspend occured. It
has been well verified on different chips. No problems were found.
Could you please include the patch as it is simple and fixes bad issue.

Signed-off-by: Alexey Korolev <akorolev@infradead.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-07-25 09:48:42 -04:00
Jean Delvare
3a3688b6af [MTD] [NOR] gen_probe: No debug message when debugging is disabled
Use pr_debug(...) instead of printk(KERN_DEBUG ...) so that the message
is only printed when debugging is enabled.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Tested-by: John stoffel <john@stoffel.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-07-11 18:23:11 +01:00
Adrian Bunk
59018b6d2a MTD/JFFS2: remove CVS keywords
Once upon a time, the MTD repository was using CVS.

This patch therefore removes all usages of the no longer updated CVS
keywords from the MTD code.

This also includes code that printed them to the user.

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-06-04 17:50:17 +01:00
Mike Rapoport
1b0b30acf3 [MTD] [NOR] Add support for Eon EN29SL800B[BT] NOR flash chips
This patch add support for non-CFI Eon EN29SL800B[BT] NOR flash chips.
The Eon chips have manufacturer ID in the first bank, therefore this patch
depends on support for flash chips with ID in bank other than 0.

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-06-04 17:23:12 +01:00
Mike Rapoport
5c9c11e1c4 [MTD] [NOR] Add support for flash chips with ID in bank other than 0
According to JEDEC "Standard Manufacturer's Identification Code"
(http://www.jedec.org/download/search/jep106W.pdf)
several first banks of NOR flash can contain 0x7f instead of actual ID.
This patch adds support for reading manufacturer ID from banks other than 0.

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-06-04 17:22:59 +01:00
Mike Rapoport
8fd310a1cc [MTD] [NOR] Add support for AMD AM29SL800D[BT] NOR flash chips
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-06-04 17:20:48 +01:00
Nate Case
deb1a5f113 [MTD] [NOR] Support for M50FLW080A and M50FLW080B
Add support for M50FLW080A and M50FLW080B revisions of LPC flash
devices.

Signed-off-by: Aaron Lindner <alindner@xes-inc.com>
Signed-off-by: Nate Case <ncase@xes-inc.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-05-14 11:03:46 +01:00
Alexander Belyakov
91949d6454 [MTD] [NOR] Remove cfi_cmdset_0001.c erase suspend fixup typo
Fix typo in erase suspend while write fixup code leading to compile time 
error if CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE was defined.

drivers/mtd/chips/cfi_cmdset_0001.c: In function 'fixup_intel_strataflash':
drivers/mtd/chips/cfi_cmdset_0001.c:212: error: 'struct cfi_pri_amdstd' has no member named 'SuspendCmdSupport'

Signed-off-by: Alexander Belyakov <abelyako@googlemail.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-05-06 15:49:21 +01:00
Jared Hulbert
a98889f3d8 [MTD][NOR] Add physical address to point() method
Adding the ability to get a physical address from point() in addition
to virtual address.  This physical address is required for XIP of
userspace code from flash.

Signed-off-by: Jared Hulbert <jaredeh@gmail.com>
Reviewed-by: Jörn Engel <joern@logfs.org>
Acked-by: Nicolas Pitre <nico@cam.org>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-05-01 18:59:11 +01:00
Thomas Kunze
fe224668df [MTD] [NOR] Fix Intel CFI driver for collie flash
collie seems to contain LH28F640BF flash chips. According to
http://sharp-world.com/products/device/flash/pdf/*FUM00701*@E.pdf
(page 83) if they have 0x51 of Extended Query Table (number of hardware
partitions) set to zero, they have a single fixed partition.
This patch makes those chips work.

Signed-off-by: Thomas Kunze <thommycheck@gmx.de>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-04-23 01:32:12 +01:00
Trent Piepho
70b072550a [MTD] [NOR] Fixup for incorrect CFI data in Spansion S29GL064/32N flash chips
This is a known erratum confirmed by Spansion.  I have an errata document,
but I can't find a link to it anywhere on their site to include here.

Some of the S29GL064N chips report 64 sectors when they should report 128,
and some of S29GL032N chips report 127 sectors when they should report 63.

Note that when the chip dies are fixed by Spansion, they will still have
the same id.  The fix is done in such a way that it won't affect corrected
chips.

The fixups use the extended id made available by a previous patch.  Without
that, virtually all newer AMD/Spansion chips will have the same ID (0x227e)
and it's not possible to apply the fixup to the correct chips.

Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-04-22 21:17:27 +01:00
Trent Piepho
fecb8865de [MTD] [NOR] Read extended device ID from AMD/Spansion CFI flash chips
AMD/Spansion use a device id of 0x7e to indicate an extended device is
present at offset 0xe and 0xf in the query data.

I've verified with Spansion that all their chips (mfr == 0x01) with an id
of 0x7e use it to indicate an extended id is present.  What's more, there
are no chips with a NON-extended id that is the same as a different chip's
extended id.  In other words, when the extended ID is present, one can
replace the normal id with the extended id without losing any information.
Which is what I've done.

Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-04-22 21:16:09 +01:00