Commit Graph

308 Commits

Author SHA1 Message Date
Russell King
178783622c ARM: dmabounce: fix map_single() error return value
When map_single() is unable to obtain a safe buffer, we must return
the dma_addr_t error value, which is ~0 rather than 0.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-03 23:24:21 +01:00
Russell King
586893ebc4 Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into devel-stable
Conflicts:
	arch/arm/Kconfig
	arch/arm/mach-exynos4/mach-nuri.c
2011-05-25 21:47:48 +01:00
Russell King
9a55d9752d Merge branch 'devel-stable' into for-linus
Conflicts:
	arch/arm/Kconfig
	arch/arm/mach-ns9xxx/include/mach/uncompress.h
2011-05-23 19:28:04 +01:00
Russell King
4b60e5f90d Merge branches 'consolidate-clksrc', 'consolidate-flash', 'consolidate-generic', 'consolidate-smp', 'consolidate-stmp' and 'consolidate-zones' into consolidate 2011-05-23 18:05:10 +01:00
Russell King
23828a7a97 clockevents: ARM sp804: obtain sp804 timer rate via clks
This allows platforms to specify the rate of the SP804 clockevent via
the clk subsystem.  While ARM boards clock these at 1MHz, BCMRing also
has SP804 timers but are clocked at different rates.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23 18:04:53 +01:00
Russell King
57cc4f7de2 clockevents: ARM sp804: allow clockevent name to be specified
This allows platforms to specify the clcokevent name upon registration.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23 18:04:53 +01:00
Russell King
7ff550de99 clocksource: ARM sp804: obtain sp804 timer rate via clks
This allows platforms to specify the rate of the SP804 clocksource via
the clk subsystem.  While ARM boards clock these at 1MHz, BCMRing also
has SP804 timers but are clocked at different rates.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23 18:04:53 +01:00
Russell King
fb593cf38f clocksource: ARM sp804: allow clocksource name to be specified
This allows platforms to specify the clocksource name upon
registration, which is necessary should they wish to register more
than one sp804 clocksource.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23 18:04:53 +01:00
Russell King
bfe45e0be8 clocksource: convert ARM 32-bit down counting clocksources
Convert SP804, MXC, Nomadik and Orion 32-bit down-counting clocksources
to generic mmio clocksource infrastructure.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Alessandro Rubini <rubini@unipv.it>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23 18:04:51 +01:00
Russell King
be20902ba6 ARM: use ARM_DMA_ZONE_SIZE to adjust the zone sizes
Rather than each platform providing its own function to adjust the
zone sizes, use the new ARM_DMA_ZONE_SIZE definition to perform this
adjustment.  This ensures that the actual DMA zone size and the
ISA_DMA_THRESHOLD/MAX_DMA_ADDRESS definitions are consistent with
each other, and moves this complexity out of the platform code.

Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-12 08:36:53 +01:00
Kukjin Kim
a73ddc61e8 ARM: S5P6442: Removing ARCH_S5P6442
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-05-12 08:10:53 +09:00
Santosh Shilimkar
6ac77e469e ARM: GIC: Convert GIC library to use the IO relaxed operations
The GIC register accesses today make use of readl()/writel()
which prove to be very expensive when used along with mandatory
barriers. This mandatory barriers also introduces an un-necessary
and expensive l2x0_sync() operation. On Cortex-A9 MP cores, GIC
IO accesses from CPU are direct and doesn't go through L2X0 write
buffer.

A DSB before writel_relaxed() in gic_raise_softirq() is added to be
compliant with the Barrier Litmus document - the mailbox scenario.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
2011-05-11 16:04:17 +01:00
Will Deacon
1a01753ed9 ARM: gic: use handle_fasteoi_irq for SPIs
Currently, the gic uses handle_level_irq for handling SPIs (Shared
Peripheral Interrupts), requiring active interrupts to be masked at
the distributor level during IRQ handling.

On a virtualised system, only the CPU interfaces are virtualised in
hardware. Accesses to the distributor must be trapped by the
hypervisor, adding latency to the critical interrupt path in Linux.

This patch modifies the GIC code to use handle_fasteoi_irq for handling
interrupts, which only requires us to signal EOI to the CPU interface
when handling is complete. Cascaded IRQ handling is also updated to use
the chained IRQ enter/exit functions to honour the flow control of the
parent chip.

Note that commit 846afbd1 ("GIC: Dont disable INT in ack callback")
broke cascading interrupts by forgetting to add IRQ masking. This is
no longer an issue because the unmask call is now unnecessary.

Tested on Versatile Express and Realview EB (1176 w/ cascaded GICs).

Tested-and-reviewed-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Tested-and-acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-05-11 16:04:17 +01:00
Rafael J. Wysocki
328f5cc302 ARM: Use struct syscore_ops instead of sysdevs for PM in common code
Convert some ARM architecture's common code to using
struct syscore_ops objects for power management instead of sysdev
classes and sysdevs.

This simplifies the code and reduces the kernel's memory footprint.
It also is necessary for removing sysdevs from the kernel entirely in
the future.

Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-04-24 19:16:08 +02:00
Russell King
a84bd2ee81 Merge branch 'fix' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into fixes 2011-04-13 23:32:13 +01:00
Justin P. Mattock
aec995900f ARM: 6872/1: arch:common:Makefile Remove unused config in the Makefile.
The patch below removes an unused config variable found by using a kernel
cleanup script.

Signed-off-by: Justin P. Mattock <justinmattock@gmail.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-04-10 21:13:37 +01:00
Lucas De Marchi
25985edced Fix common misspellings
Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
2011-03-31 11:26:23 -03:00
Thomas Gleixner
f38c02f3b3 arm: Fold irq_set_chip/irq_set_handler
Use irq_set_chip_and_handler() instead. Converted with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:58 +02:00
Thomas Gleixner
9323f26186 arm: Reorder irq_set_ function calls
Reorder 
irq_set_chip()
irq_set_chip_data()
irq_set_handler()

to

irq_set_chip()
irq_set_handler()
irq_set_chip_data()

so the next patch can combine irq_set_chip() and irq_set_handler() to
irq_set_chip_and_handler().

Automated conversion with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:58 +02:00
Thomas Gleixner
6845664a6a arm: Cleanup the irq namespace
Convert to the new function names. Automated with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:57 +02:00
Thomas Gleixner
fdea77b88e arm: gic: Use proper accessor functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:56 +02:00
Russell King
1f0090a1ea Merge branch 'misc' into devel
Conflicts:
	arch/arm/Kconfig
2011-03-16 23:35:25 +00:00
Santosh Shilimkar
d7ed36a4ea ARM: 6777/1: gic: Add hooks for architecture specific extensions
Few architectures combine the GIC with an external interrupt
controller. On such systems it may be necessary to update both
the GIC registers and the external controller's registers to control
IRQ behavior.

This can be addressed in couple of possible methods.
 1. Export common GIC routines along with 'struct irq_chip gic_chip'
    and allow architectures to have custom function by override.
 2. Provide architecture specific function pointer hooks
    within GIC library and leave platforms to add the necessary
    code as part of these hooks.

First one might be non-intrusive but have few shortcomings like arch
needs to have there own custom gic library. Locks used should be
common since it caters to same IRQs etc. Maintenance point of view
also it leads to multiple file fixes.

The second probably is cleaner and portable. It ensures that all the
common GIC infrastructure is not touched and also provides archs to
address their specific issue.

Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Colin Cross <ccross@android.com>
Tested-by: Colin Cross <ccross@android.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-09 00:18:47 +00:00
Kukjin Kim
59a4f92a36 ARM: 6762/1: Update number of VIC for S5P6442 and S5PC100
The S5P6442 and S5PC100 SoCs have 4 VICs. However, default VIC number
is defined 2 in arch/arm/common. So can be happened some problem on it.
Basically, it requires for suspend and resume.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-26 13:36:56 +00:00
Kukjin Kim
6cc6b33ab9 ARM: 6761/1: Update number of VIC for S5PV210
The S5PV210 SoC have 4 VICs. It requires for suspend and resume.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-26 13:36:55 +00:00
Russell King
c191789c78 ARM: irq migration: update GIC migration code
This cleans up after the conversion to irq_data.  Rename the function
to match the method, and remove the now useless lookup of the irq
descriptor which is never used.  Move the bitmask calculation out of
the irq_controller_lock region.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-23 17:24:16 +00:00
Linus Torvalds
16c1020362 Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (161 commits)
  ARM: pxa: fix building issue of missing physmap.h
  ARM: mmp: PXA910 drive strength FAST using wrong value
  ARM: mmp: MMP2 drive strength FAST using wrong value
  ARM: pxa: fix recursive calls in pxa_low_gpio_chip
  AT91: Support for gsia18s board
  AT91: Acme Systems FOX Board G20 board files
  AT91: board-sam9m10g45ek.c: Remove duplicate inclusion of mach/hardware.h
  ARM: pxa: fix suspend/resume array index miscalculation
  ARM: pxa: use cpu_has_ipr() consistently in irq.c
  ARM: pxa: remove unused variable in clock-pxa3xx.c
  ARM: pxa: fix warning in zeus.c
  ARM: sa1111: fix typo in sa1111_retrigger_lowirq()
  ARM mxs: clkdev related compile fixes
  ARM i.MX mx31_3ds: Fix MC13783 regulator names
  ARM: plat-stmp3xxx: irq_data conversion.
  ARM: plat-spear: irq_data conversion.
  ARM: plat-orion: irq_data conversion.
  ARM: plat-omap: irq_data conversion.
  ARM: plat-nomadik: irq_data conversion.
  ARM: plat-mxc: irq_data conversion.
  ...

Fix up trivial conflict in arch/arm/plat-omap/gpio.c (Lennert
Buytenhek's irq_data conversion clashing with some omap irq updates)
2011-01-15 12:33:40 -08:00
Pavel Machek
cae399880f ARM: sa1111: fix typo in sa1111_retrigger_lowirq()
Signed-off-by: Pavel Machek <pma@sysgo.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2011-01-14 10:21:01 -06:00
Linus Torvalds
008d23e485 Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (43 commits)
  Documentation/trace/events.txt: Remove obsolete sched_signal_send.
  writeback: fix global_dirty_limits comment runtime -> real-time
  ppc: fix comment typo singal -> signal
  drivers: fix comment typo diable -> disable.
  m68k: fix comment typo diable -> disable.
  wireless: comment typo fix diable -> disable.
  media: comment typo fix diable -> disable.
  remove doc for obsolete dynamic-printk kernel-parameter
  remove extraneous 'is' from Documentation/iostats.txt
  Fix spelling milisec -> ms in snd_ps3 module parameter description
  Fix spelling mistakes in comments
  Revert conflicting V4L changes
  i7core_edac: fix typos in comments
  mm/rmap.c: fix comment
  sound, ca0106: Fix assignment to 'channel'.
  hrtimer: fix a typo in comment
  init/Kconfig: fix typo
  anon_inodes: fix wrong function name in comment
  fix comment typos concerning "consistent"
  poll: fix a typo in comment
  ...

Fix up trivial conflicts in:
 - drivers/net/wireless/iwlwifi/iwl-core.c (moved to iwl-legacy.c)
 - fs/ext4/ext4.h

Also fix missed 'diabled' typo in drivers/net/bnx2x/bnx2x.h while at it.
2011-01-13 10:05:56 -08:00
Lennert Buytenhek
f013c98dd2 ARM: vic: irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
2011-01-13 17:18:20 +01:00
Lennert Buytenhek
8231e74150 ARM: sa1111: irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Acked-by: Kristoffer Ericson <kristoffer.ericson@gmail.com>
2011-01-13 17:18:19 +01:00
Lennert Buytenhek
680244df88 ARM: LoCoMo: irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
2011-01-13 17:18:18 +01:00
Lennert Buytenhek
8cdd4572ea ARM: ITE 8152: irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Acked-by: Mike Rapoport <mike@compulab.co.il>
2011-01-13 17:18:17 +01:00
Lennert Buytenhek
7d1f4288ac ARM: gic: irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Acked-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2011-01-13 17:18:16 +01:00
Russell King
4073723acb Merge branch 'misc' into devel
Conflicts:
	arch/arm/Kconfig
	arch/arm/common/Makefile
	arch/arm/kernel/Makefile
	arch/arm/kernel/smp.c
2011-01-06 22:32:52 +00:00
Russell King
4ec3eb1363 Merge branch 'smp' into misc
Conflicts:
	arch/arm/kernel/entry-armv.S
	arch/arm/mm/ioremap.c
2011-01-06 22:32:03 +00:00
Russell King
24056f5250 ARM: DMA: add support for DMA debugging
Add ARM support for the DMA debug infrastructure, which allows the
DMA API usage to be debugged.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-01-06 22:31:11 +00:00
Russell King
58daf18cdc Merge branch 'clksrc' into devel
Conflicts:
	arch/arm/mach-vexpress/v2m.c
	arch/arm/plat-omap/counter_32k.c
	arch/arm/plat-versatile/Makefile
2011-01-05 18:09:03 +00:00
Russell King
31edf274f9 Merge branches 'ftrace', 'gic', 'io', 'kexec', 'mod', 'sa11x0', 'sh' and 'versatile' into devel 2011-01-05 18:08:10 +00:00
Imre Kaloz
88a5810160 ARM: fix IXP4xx build failure
arm: export dma_set_coherent_mask

While a regression was fixed with commit 710224fa27 (arm: fix
"arm: fix pci_set_consistent_dma_mask for dmabounce devices"), a
new one was introduced as dma_set_coherent_mask wasn't exported
for modules. This patch takes care for this issue.

Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-12-28 11:22:20 -08:00
Jiri Kosina
4b7bd36470 Merge branch 'master' into for-next
Conflicts:
	MAINTAINERS
	arch/arm/mach-omap2/pm24xx.c
	drivers/scsi/bfa/bfa_fcpim.c

Needed to update to apply fixes for which the old branch was too
outdated.
2010-12-22 18:57:02 +01:00
Russell King
ac61d143ff ARM: GIC: move enablement of PPI interrupts to gic.c
Avoid adding nasty genirq-specific code to local timers to enable PPI
interrupts.  Instead, provide a gic function to do this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14 19:21:52 +00:00
Russell King
bef8f9ee32 ARM: GIC: move gic_data[] initialization into gic_init()
This avoids writing unnecessarily to gic_data[] from other CPUs,
making this a mostly read-only variable.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14 19:21:44 +00:00
Russell King
ff2e27ae0b ARM: GIC: consolidate gic_cpu_base_addr to common GIC code
Every architecture using the GIC has a gic_cpu_base_addr pointer for
GIC 0 for their entry assembly code to use to decode the cause of the
current interrupt.  Move this into the common GIC code.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14 19:21:42 +00:00
Russell King
384895330e ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_init
We don't need to re-pass the base address for the CPU interfaces to the
GIC for secondary CPUs, as it will never be different from the boot CPU
- and even if it was, we'd overwrite the boot CPU's base address.

Get rid of this argument, and rename to gic_secondary_init().

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14 19:21:40 +00:00
Russell King
b580b899dd ARM: GIC: provide a single initialization function for boot CPU
Provide gic_init() which initializes the GIC distributor and current
CPU's GIC interface for the boot (or single) CPU.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14 19:21:30 +00:00
Chao Xie
87507500b7 ARM: 6524/1: GIC irq desciptor bug fix
gic_set_cpu will directly use irq_desc[]. If CONFIG_SPARSE_IRQ is
enabled, there is no irq_desc[]. So we need use irq_to_desc(irq) to
get the descriptor for irq.

Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-06 11:03:31 +00:00
Pawel Moll
e6afec9b68 ARM: 6496/1: GIC: Do not try to register more then NR_IRQS interrupts
This change limits number of GIC-originating interrupts to the
platform maximum (defined by NR_IRQS) while still initialising
all distributor registers.

Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-30 13:38:57 +00:00
Jean-Christop PLAGNIOL-VILLARD
6d803ba736 ARM: 6483/1: arm & sh: factorised duplicated clkdev.c
factorise some generic infrastructure to assist looking up struct clks
for the ARM & SH architecture.

as the code is identical at 99%

put the arch specific code for allocation as example in asm/clkdev.h

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26 10:51:04 +00:00
Russell King
9395f6ea3c ARM: GIC: don't disable software generated interrupts
Software generated interrupts (SGI) are used for IPIs by the kernel.
While previous revisions of the GIC hardware were specified not to
implement enable bits for SGIs, more recent hardware is now permitted
to implement these bits in a per-CPU banked register.

The priority registers for the PPI and SGIs are also per-CPU banked
registers, so ensure that these are also appropriately initialized.

Reported-by: Scott Valentine <svalentine@concentris-systems.com>
Acked-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-12 15:15:29 +00:00