Commit Graph

35 Commits

Author SHA1 Message Date
Tony Lindgren
72533b77d3 arm: mvebu: Fix compile for multiplatform when ARMv6 is selected
Some systems compile in both ARMv6 and ARMv7 into multiplatform
configurations. This means the default compiler flags are for ARMv6,
and we will get:

arch/arm/mach-mvebu/coherency_ll.S: Assembler messages:
arch/arm/mach-mvebu/coherency_ll.S:45: Error: selected processor does not support `dsb'

Fix this by specifying ARMv7 flags for coherency_ll.o.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-01-11 12:17:58 -08:00
Gregory CLEMENT
d792b1e94d arm: mvebu: add L2 cache support
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-and-reviewed-by: Yehuda Yitschak <yehuday@marvell.com>
Tested-and-reviewed-by: Lior Amsalem <alior@marvell.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>

Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-11-27 15:35:05 +00:00
Jason Cooper
56580bb422 Merge branch 'mvebu-misc-fixes' of git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything 2012-11-24 04:08:49 +00:00
Thomas Petazzoni
9f3410ff21 arm: mvebu: fix address decoding armada_cfg_base() function
The armada_cfg_base() function returns the base address of the
registers that allow to configure the decoding for a particular
address window. On Armada 370/XP, the lower windows have more
configuration registers (4 registers) than the higher windows (2
registers). This armada_cfg_base() takes this into account by doing a
different offset calculation depending on the window number, but this
offset calculation was wrong for the higher windows.

Even though we were not using high window numbers until now (only
window 0 is used to map the BootROM, needed for SMP), we use this
function at boot time to disable all windows to ensure that nothing
remains intialized from what the bootloader has done.

Unfortunately, the U-Boot on the OpenBlocks AX3-4 uses a window with a
high number (above 8) to remap the BootROM. And then when the kernel
boots, it remaps the BootROM in window 0. Normally, this is not a
problem, because all windows have previously been disabled. Except
that due to our wrong offset calculation, the windows with high
numbers were not properly disabled, leading to the BootROM being
mapped twice. The visible result of this bug was that the kernel was
unable to get the second CPU started on the OpenBlocks AX3-4
platform. With this fix, all windows are properly cleared at boot
time, the BootROM is remapped only once in window 0, and the second
CPU boots fine.

Thanks a lot to Lior Amsamlen <alior@marvell.com> for his help in
debugging this problem.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
Strictly speaking, this bug was introduced in 3.7, but since the only
platforms supported in 3.7 were Armada 370 and Armada XP, and there
was anyway no SMP support at this time, it isn't really worth the
effort to push this patch in 3.7.
2012-11-22 18:15:20 +01:00
Thomas Petazzoni
1112b36094 SMP support for Armada XP
The purpose of this series is to add the SMP support for the Armada XP
 SoCs. Beside the SMP support itself brought by the last 3 commits,
 this series also adds the support for the coherency fabric unit and
 the power management service unit.
 
 The coherency fabric is responsible for ensuring hardware coherency
 between all CPUs and between CPUs and I/O masters. This unit is also
 available for Armada 370 and will be used in an incoming patch set
 for hardware I/O cache coherency.
 
 The power management service unit is responsible for powering down and
 waking up CPUs and other SOC units.
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Merge tag 'marvell-armadaxp-smp-for-3.8' of github.com:MISL-EBU-System-SW/mainline-public into mevbu-dt-additions

SMP support for Armada XP

The purpose of this series is to add the SMP support for the Armada XP
SoCs. Beside the SMP support itself brought by the last 3 commits,
this series also adds the support for the coherency fabric unit and
the power management service unit.

The coherency fabric is responsible for ensuring hardware coherency
between all CPUs and between CPUs and I/O masters. This unit is also
available for Armada 370 and will be used in an incoming patch set
for hardware I/O cache coherency.

The power management service unit is responsible for powering down and
waking up CPUs and other SOC units.

Conflicts:
	arch/arm/mach-mvebu/armada-370-xp.c
2012-11-22 10:55:09 +01:00
Thomas Petazzoni
a79cfde1b1 Merge branch 'for-jason-1/cleanup' into mevbu-dt-additions 2012-11-22 10:50:55 +01:00
Jason Cooper
32d6448a08 Add hardware I/O coherency support for Armada 370/XP
The purpose of this patch set is to add hardware I/O Coherency support
 for Armada 370 and Armada XP. Theses SoCs come with an unit called
 coherency fabric. A beginning of the support for this unit have been
 introduced with the SMP patch set. This series extend this support:
 the coherency fabric unit allows to use the Armada XP and the Armada
 370 as nearly coherent architectures.
 
 The third patches enables this new feature and register our own set
 of DMA ops, to benefit this hardware enhancement.
 
 The first patches exports a dma operation function needed to register
 our own set of dma ops.
 
 The second patch introduces a new flag for the address decoding
 configuration in order to be able to set the memory windows as
 shared memory.
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Merge tag 'marvell-hwiocc-for-3.8' of git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything

Add hardware I/O coherency support for Armada 370/XP

The purpose of this patch set is to add hardware I/O Coherency support
for Armada 370 and Armada XP. Theses SoCs come with an unit called
coherency fabric. A beginning of the support for this unit have been
introduced with the SMP patch set. This series extend this support:
the coherency fabric unit allows to use the Armada XP and the Armada
370 as nearly coherent architectures.

The third patches enables this new feature and register our own set
of DMA ops, to benefit this hardware enhancement.

The first patches exports a dma operation function needed to register
our own set of dma ops.

The second patch introduces a new flag for the address decoding
configuration in order to be able to set the memory windows as
shared memory.
2012-11-21 20:02:46 +00:00
Jason Cooper
86b7d3f779 SMP support for Armada XP
The purpose of this series is to add the SMP support for the Armada XP
 SoCs. Beside the SMP support itself brought by the last 3 commits,
 this series also adds the support for the coherency fabric unit and
 the power management service unit.
 
 The coherency fabric is responsible for ensuring hardware coherency
 between all CPUs and between CPUs and I/O masters. This unit is also
 available for Armada 370 and will be used in an incoming patch set
 for hardware I/O cache coherency.
 
 The power management service unit is responsible for powering down and
 waking up CPUs and other SOC units.
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Merge tag 'marvell-armadaxp-smp-for-3.8' of git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything

SMP support for Armada XP

The purpose of this series is to add the SMP support for the Armada XP
SoCs. Beside the SMP support itself brought by the last 3 commits,
this series also adds the support for the coherency fabric unit and
the power management service unit.

The coherency fabric is responsible for ensuring hardware coherency
between all CPUs and between CPUs and I/O masters. This unit is also
available for Armada 370 and will be used in an incoming patch set
for hardware I/O cache coherency.

The power management service unit is responsible for powering down and
waking up CPUs and other SOC units.
2012-11-21 20:01:15 +00:00
Gregory CLEMENT
e60304f8cb arm: mvebu: Add hardware I/O Coherency support
Armada 370 and XP come with an unit called coherency fabric. This unit
allows to use the Armada 370/XP as a nearly coherent architecture. The
coherency mechanism uses snoop filters to ensure the coherency between
caches, DRAM and devices. This mechanism needs a synchronization
barrier which guarantees that all the memory writes initiated by the
devices have reached their target and do not reside in intermediate
write buffers. That's why the architecture is not totally coherent and
we need to provide our own functions for some DMA operations.

Beside the use of the coherency fabric, the device units will have to
set the attribute flag of the decoding address window to select the
accurate coherency process for the memory transaction. This is done
each device driver programs the DRAM address windows. The value of the
attribute set by the driver is retrieved through the
orion_addr_map_cfg struct filled during the early initialization of
the platform.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Yehuda Yitschak <yehuday@marvell.com>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
2012-11-21 17:07:49 +01:00
Gregory CLEMENT
45f5984a8a arm: mvebu: Add SMP support for Armada XP
This enables SMP support on the Armada XP processor. It adds the
mandatory functions to support SMP such as: the SMP initialization
functions in platsmp.c, the secondary CPU entry point in headsmp.S and
the CPU hotplug initial support in hotplug.c.

Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
2012-11-21 16:49:38 +01:00
Gregory CLEMENT
de4901933f arm: mm: Add support for PJ4B cpu and init routines
PJ4B is an implementation of the ARMv7 (such as the Cortex A9 for
example) released by Marvell. This CPU is currently found in
Armada 370 and Armada XP SoCs. This patch provides a support for the
specific initialization of this CPU.

Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
2012-11-21 16:49:38 +01:00
Gregory CLEMENT
344e873e56 arm: mvebu: Add IPI support via doorbells
This patch enhances the IRQ controller driver to add support for
Inter-Processor-Interrupts that are needed to enable SMP support.

Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-11-21 16:49:37 +01:00
Gregory CLEMENT
7444dad240 arm: mvebu: Add initial support for power managmement service unit
The Armada 370 and Armada XP SOCs have a power management service unit
which is responsible for powering down and waking up CPUs and other
SOC units. This patch adds support for this unit.

Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-11-21 16:49:36 +01:00
Gregory CLEMENT
009f13159b arm: mvebu: Add support for coherency fabric in mach-mvebu
The Armada 370 and Armada XP SOCs have a coherency fabric unit which
is responsible for ensuring hardware coherency between all CPUs and
between CPUs and I/O masters. This patch provides the basic support
needed for SMP.

Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
2012-11-21 16:49:06 +01:00
Gregory CLEMENT
53d2f8899f arm: mvebu: increase atomic coherent pool size for armada 370/XP
For Armada 370/XP we have the same problem that for the commit
cb01b63, so we applied the same solution: "The default 256 KiB
coherent pool may be too small for some of the Kirkwood devices, so
increase it to make sure that devices will be able to allocate their
buffers with GFP_ATOMIC flag"

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
2012-11-20 15:37:04 +01:00
Gregory CLEMENT
9d2027830c clk: armada-370-xp: add support for clock framework
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-11-20 14:46:48 +01:00
Thomas Petazzoni
8c4340fcfb arm: mvebu: fix typo in machine name for Armada 370/XP
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-11-14 16:35:10 +01:00
Thomas Petazzoni
61505e117b arm: mvebu: don't list all boards in dt compat field for Armada 370/XP
Instead of listing explicitly all boards in the .dt_compat field of
the DT_MACHINE_START structure for Armada 370/XP, use instead a
compatible string that is common to all boards using the Armada
370/XP.

This allows to add new boards by just using a different Device Tree,
without having to modify the source code of the kernel.

Note that the name of the array containing the compatible string is
also renamed, to reflect the fact that it no longer contains the list
of all boards.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-11-14 16:35:05 +01:00
Rob Herring
46f2007c1e ARM: mvebu: fix build breaks from multi-platform conversion
Moving ARCH_MVEBU for multi-platform support caused several breakages in
recently added addr-map and pinctrl support for mvebu. This adds the
necessary selects and include paths to fix the build.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-09-28 22:27:07 +02:00
Olof Johansson
c740ae7404 Merge branch 'kirkwood/drivers' of git://git.infradead.org/users/jcooper/linux into late/kirkwood
From Jason Cooper:

New drivers:
 - pinctrl (dove, kirkwood, mvebu)
 - gpio (mvebu)

* 'kirkwood/drivers' of git://git.infradead.org/users/jcooper/linux:
  arm: mvebu: add gpio support in defconfig
  arm: mvebu: add DT information for GPIO banks on Armada 370 and XP
  arm: mvebu: use GPIO support now that a driver is available
  Documentation: add description of DT binding for the gpio-mvebu driver
  gpio: introduce gpio-mvebu driver for Marvell SoCs
  arm: mvebu: select the pinctrl drivers for Armada 370 and Armada XP platforms
  arm: mvebu: split Kconfig options for Armada 370 and XP
  ARM: mvebu: adjust Armada XP evaluation board DTS
  ARM: mvebu: Add pinctrl support to Armada 370 SoC
  ARM: mvebu: Add pinctrl support to Armada XP SoCs
  pinctrl: mvebu: add pinctrl driver for Armada XP
  pinctrl: mvebu: add pinctrl driver for Armada 370
  pinctrl: mvebu: kirkwood pinctrl driver
  pinctrl: mvebu: dove pinctrl driver
  pinctrl: mvebu: pinctrl driver core

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-09-22 14:23:11 -07:00
Olof Johansson
0d601f613b Merge branch 'kirkwood/addr_decode' of git://git.infradead.org/users/jcooper/linux into late/kirkwood
* 'kirkwood/addr_decode' of git://git.infradead.org/users/jcooper/linux:
  arm: mvebu: add address decoding controller to the DT
  arm: mvebu: add basic address decoding support to Armada 370/XP
  arm: plat-orion: make bridge_virt_base non-const to support DT use case
  arm: plat-orion: introduce PLAT_ORION_LEGACY hidden config option
  arm: plat-orion: use void __iomem pointers for addr-map functions
  arm: plat-orion: use void __iomem pointers for time functions
  arm: plat-orion: use void __iomem pointers for MPP functions
  arm: plat-orion: use void __iomem pointers for UART registration functions
  arm: mach-mvebu: use IOMEM() for base address definitions
  arm: mach-orion5x: use IOMEM() for base address definitions
  arm: mach-mv78xx0: use IOMEM() for base address definitions
  arm: mach-kirkwood: use IOMEM() for base address definitions
  arm: mach-dove: use IOMEM() for base address definitions
  arm: mach-orion5x: use plus instead of or for address definitions
  arm: mach-mv78xx0: use plus instead of or for address definitions
  arm: mach-kirkwood: use plus instead of or for address definitions
  arm: mach-dove: use plus instead of or for address definitions

This branch had quite a few conflicts, in particular with the PCI static
map rework from Rob Herring, and a few other context conflicts due to
changes in Kconfig, etc.

I fixed up conflicts in:
	arch/arm/Kconfig
	arch/arm/mach-dove/common.c
	arch/arm/mach-dove/include/mach/dove.h
	arch/arm/mach-kirkwood/common.c
	arch/arm/mach-kirkwood/include/mach/kirkwood.h
	arch/arm/mach-mv78xx0/common.c
	arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
	arch/arm/mach-orion5x/common.c
	arch/arm/mach-orion5x/include/mach/orion5x.h

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-09-22 14:22:47 -07:00
Thomas Petazzoni
93a59cf3d3 arm: mvebu: use GPIO support now that a driver is available
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-22 14:51:38 +00:00
Thomas Petazzoni
5beb5f889e arm: mvebu: select the pinctrl drivers for Armada 370 and Armada XP platforms
This patch actually enables pinctrl drivers for Armada 370 and XP.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-22 14:50:27 +00:00
Thomas Petazzoni
85077087d4 arm: mvebu: split Kconfig options for Armada 370 and XP
Until now, all the code for Armada 370 and XP was common, so we had a
single Kconfig option to support all boards using both SoCs. With the
addition of pinctrl drivers, this situation has changed: those two
SoCs are radically different in terms of pinctrl, so they have two
separate drivers. Since pinctrl drivers are typically select-ed from
the SoC Kconfig option, it makes sense to split the 370/XP option into
two separate options: one for Armada 370 and another for Armada XP.

We keep an hidden option selected by both ARMADA_370 and ARMADA_XP in
order to easily compile common code.

A followup patch actually makes use of this split to select the
appropriate pinctrl drivers.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory Clement <gregory.clement@free-electrons.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-22 14:50:26 +00:00
Thomas Petazzoni
74dd80a7b9 arm: mvebu: add basic address decoding support to Armada 370/XP
This commit adds basic support for address decoding configuration for
the Armada 370 and Armada XP SoCs, re-using the infrastructure
provided in plat-orion.

For now, only a BootROM window is configured on Armada XP, which is
needed to get the non-boot CPUs started and is therefore a requirement
for SMP support.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21 18:05:18 +00:00
Thomas Petazzoni
9758e70a44 arm: mach-mvebu: use IOMEM() for base address definitions
We now define all virtual base address constants using IOMEM() so that
those are naturally typed as void __iomem pointers, and we do the
necessary adjustements in the mach-mvebu code.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21 18:04:05 +00:00
Rob Herring
387798b37c ARM: initial multiplatform support
This lets us build a multiplatform kernel for experimental purposes.
However, it will not be useful for any real work, because it relies
on a number of useful things to be disabled for now:

* SMP support must be turned off because of conflicting symbols.
  Marc Zyngier has proposed a solution by adding a new SOC
  operations structure to hold indirect function pointers
  for these, but that work is currently stalled

* We turn on SPARSE_IRQ unconditionally, which is not supported
  on most platforms. Each of them is currently in a different
  state, but most are being worked on.

* A common clock framework is in place since v3.4 but not yet
  being used. Work on this is on its way.

* DEBUG_LL for early debugging is currently disabled.

* THUMB2_KERNEL does not work with allyesconfig because the
  kernel gets too big

[Rob Herring]: Rebased to not be dependent on the mass mach header rename.
As a result, omap2plus, imx, mxs and ux500 are not converted. Highbank,
picoxcell, mvebu, and socfpga are converted.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
2012-09-14 09:22:06 -05:00
Rob Herring
6eb5be3411 ARM: mvebu: move armada-370-xp.h in mach dir
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
2012-09-14 09:22:06 -05:00
Rob Herring
360a0cab50 ARM: move all dtb targets out of Makefile.boot
In preparation to support multi-platform kernels, move all the dtb targets
out of the mach Makefile.boot and into the arch/arm/boot/dts/Makefile
which is closer to the sources.

DTBs are only built when CONFIG_OF is enabled and now use top level
CONFIG_ARCH_xxx instead of chip or board specific config options.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Andrew Victor <linux@maxim.org.za>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
2012-09-14 09:22:04 -05:00
Rob Herring
bfd5af9940 ARM: mvebu: move debug macros to include/debug
Move mvebu debug-macro.S over to common debug macro directory.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
2012-09-14 09:22:02 -05:00
Thomas Petazzoni
a44fccbc18 arm: mvebu: generate DTBs for supported SoCs
Add the necessary dtb-$(CONFIG_...) entries so that "make dtbs"
generates the Device Tree Blobs that correspond to the selected mvebu
SoCs.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-07-17 22:38:06 +02:00
Ben Dooks
f3e16ccd03 ARM: mvebu: MPIC: read number of interrupts from control register
Read the number of MPIC interrupts from the controller and only register
that many.

[gregory.clement@free-electrons.com: rename armada symbol name to fit
with new name: armada_370_xp]

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Lior Amsalem <alior@marvell.com>
2012-07-10 15:47:52 +02:00
Thomas Petazzoni
9ae6f740b4 arm: mach-mvebu: add support for Armada 370 and Armada XP with DT
[ben.dooks@codethink.co.uk: ensure error check on of_property_read_u32]
[ben.dooks@codethink.co.uk: use mpic address instead of bus-unit's ]
[ben.dooks@codethink.co.uk: BUG_ON() if the of_iomap() fails for mpic]
[ben.dooks@codethink.co.uk: move mpic per-cpu register base ]
[ben.dooks@codethink.co.uk: number fetch should use irqd_to_hwirq()]

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Lior Amsalem <alior@marvell.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Yehuda Yitschak <yehuday@marvell.com>
Tested-by: Lior Amsalem <alior@marvell.com>
2012-07-10 15:47:49 +02:00
Gregory CLEMENT
31af49db7b arm: mach-mvebu: add source files
[ben.dooks@codethink.co.uk: fixup style error in system-controller]
[ben.dooks@codethink.co.uk: check result of of_match_node()]

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Lior Amsalem <alior@marvell.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Yehuda Yitschak <yehuday@marvell.com>
Tested-by: Lior Amsalem <alior@marvell.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
2012-07-10 15:47:48 +02:00
Thomas Petazzoni
bf54439c34 arm: mach-mvebu: add header
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Lior Amsalem <alior@marvell.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Yehuda Yitschak <yehuday@marvell.com>
Tested-by: Lior Amsalem <alior@marvell.com>
2012-07-10 15:47:47 +02:00