Commit Graph

468830 Commits

Author SHA1 Message Date
Ben Skeggs
9506140f42 drm/g94-/disp: calculate some dp audio constants
NVIDIA appear to have tweaked the algorithm from GF110, this implements
the previous algorithm for them still.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:17 +10:00
Ben Skeggs
3eee8646c1 drm/gt214-/kms: perform hda codec setup on displayport too
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:16 +10:00
Ben Skeggs
a522946174 drm/gk104-/disp: infoframe registers moved yet again on kepler
Thanks to Vincent Pelletier for pointing this out and providing a proof of
concept patch on the list.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:16 +10:00
Ben Skeggs
c378eb7461 drm/nouveau/bios: parse older ramcfg/timing data like we do newer ones
Done after discussion with Roy.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:15 +10:00
Roy Spliet
a407318913 drm/nva3/fb/ram: Per-partition regs
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:15 +10:00
Roy Spliet
930da220bf drm/nouveau/fb/ram: Support strided regs
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:14 +10:00
Roy Spliet
de1c4e281b drm/nv50/fb/ram: Store the number of partitions in the designated fields
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:14 +10:00
Roy Spliet
1dce626404 drm/nv50/kms: Set VBLANK time in modeset script
Solves blinking on reclocking memory. The value set is an underestimate, but
with non-reduced vblanking this should give us plenty of time

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:14 +10:00
Roy Spliet
2a7fa6744c drm/nouveau/bios: Add rammap support for version 1.0
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:13 +10:00
Ben Skeggs
7a2f9743ea drm/gf100-/pwr/memx: block host and fifo around reclock
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:13 +10:00
Ben Skeggs
30da080697 drm/nouveau/pwr/memx: fix command ordering around block/unblock
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:12 +10:00
Ben Skeggs
630a6a466b drm/nouveau/pwr/memx: rename fb off/on to block/unblock
More accurate as to the function of the opcodes.  Not only is FB disabled,
but the host is prevented from touching the GPU.  An upcoming patch for
Kepler will also halt PFIFO (as NVIDIA does).

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:12 +10:00
Roy Spliet
2fe7eaa0d4 drm/nva3/clk: Pause the GPU before reclocking
V2: always call post correctly even if pre fails
V3: move function prototype to nva3.h

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
2014-09-15 22:25:12 +10:00
Emil Velikov
b485a7005f drm/nouveau/gpio: rename g92 class to g94
nv92 hardware has only 16 interrupt lines, while nv94 and later
has 32. Accessing 0xe0c{0,4} registers on nv92 can lead to incorrect
PDISP setup. This is a regression introduced with

commit 9d0f5ec9ee0fd5dc5fc1cc2cf559286431e406e3
Author: Ben Skeggs <bskeggs@redhat.com>
Date:   Mon May 12 15:22:42 2014 +1000

    gpio: split g92 class from nv50

Reported-by: estece on #nouveau
Cc: stable@vger.kernel.org # 3.16+
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:11 +10:00
Ben Skeggs
6cc406157d drm/gk104-/fb/ram: move fb enable/disable to same place as nvidia
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:11 +10:00
Ben Skeggs
b6f97a089b drm/gk104/fb/ram: twiddle some more bits when reclocking
*when* this is done is only a rough approximation of what the binary driver
does.. need to investigate more to see if it matters

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:10 +10:00
Ben Skeggs
5af430abdf drm/nouveau/bios: parse another large chunk of random memory config data
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:10 +10:00
Ben Skeggs
91e4611ddc drm/gk104-/fb/ram: perform certain steps only when bios data differs
Awful, awful.  But, on the GK106 I have, some upcoming patches show
that this is actually necessary after all.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:09 +10:00
Ben Skeggs
d26e74895f drm/gk104-/fb/ram: parse ramcfg data for all frequencies up-front
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:09 +10:00
Ben Skeggs
64804a6d51 drm/gk104-/fb/ram: use parsed timing data in mr routines
All the other chipsets should be moved over to this too.  It's not needed
yet for the upcoming commits, so left this step as it'll conflict badly
with Roy's GT21x reclocking work.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:09 +10:00
Ben Skeggs
d9b5f261db drm/nouveau/bios: parse freq ranges and timing id into ramcfg struct
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:08 +10:00
Ben Skeggs
595d373f1e drm/nouveau/bios: memset dcb struct to zero before parsing
Fixes type/mask calculation being based on uninitialised data for VGA
outputs.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:08 +10:00
Ben Skeggs
6b07c6cfd1 drm/gk104/fb/ram: make use of training data provided by vbios
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:07 +10:00
Ben Skeggs
43b6b2029e drm/nouveau/bios: add support for parsing table at BIT 'M' v2 + 0x09
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:07 +10:00
Ben Skeggs
7500bb7eb4 drm/nouveau/bios: add support for parsing table at BIT 'M' v2 + 0x05
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:06 +10:00
Ben Skeggs
299dea4e0e drm/gk104/fb/ram: fix register for second set of training data
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:06 +10:00
Ben Skeggs
a6a4df9610 drm/gk104/fb/ram: more random magic in fb init
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:06 +10:00
Ben Skeggs
4cc6c3fe39 drm/gk104/fb/ram: skip table entry for mode we're already in
NVIDIA binary driver appears to, not sure if it's for a good reason, but
grasping at straws for some GDDR5 reclocking issues here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:05 +10:00
Roy Spliet
50c4088313 drm/nouveau/fb/sddr2: Generate MR values
V2: Always disable DLL reset

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:05 +10:00
Roy Spliet
9c870007e9 drm/nouveau/fb/sddr3: Expand MR generation
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:04 +10:00
Roy Spliet
941844327c drm/nva3/pwr/memx: Match blob's fb access behaviour
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:04 +10:00
Roy Spliet
6778911b20 drm/nouveau/pwr/memx: Return debugging information
Time measured from disabling FB to re-enabling, PPWR_IN reveals status of
heads at the end of script. Helps debug various issues (like flicker).

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:04 +10:00
Roy Spliet
d93e996aed drm/nouveau/pwr/memx: Make FB disable and enable explicit
Needs to be done after wait-for-VBLANK, and NVA3 requires register writes
in between.

Rather than hard-coding register writes, just split out fb_disable and
fb_enable.

v2. Squashed "fb/ramnve0: disable fb before reclocking"

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:03 +10:00
Roy Spliet
e1a6f7da9a drm/nva3/pwr/memx: Implement "wait for VBLANK"
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:03 +10:00
Martin Peres
3a405258b2 drm/nouveau/therm/nv84+: do not expose non-calibrated internal temp sensor
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:02 +10:00
Martin Peres
c5b4865e20 drm/nouveau/therm: make sure the temperature settings are sane on nv84+
One of my nv92 has a calibrated internal sensor but it displays 0°C
as the default values use sw calibration values to force the temperature
to 0.

Since we cannot read the temperature from the adt7473 present on this board,
let's re-enable the internal reading!

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:02 +10:00
Martin Peres
3ca6cd435e drm/nouveau/subdev: add a pfuse subdev v2
We will use this subdev to disable temperature reading on cards that did not
get a sensor calibration in the factory.

v2:
- rename "nouveau_fuse_rd32" to "gxXXX_fuse_rd32" as adviced by Christian Costa
- fold the code a little as adviced by Emil Velikov

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:01 +10:00
Roy Spliet
3d40a7176d drm/nva3/clk: Set intermediate core clock on reclocking
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:01 +10:00
Roy Spliet
a749a1fb55 drm/nva3/clk: For PLL clocks always make sure the PLL is not in use
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:01 +10:00
Roy Spliet
275dd6f48f drm/nva3/clk: Abort when PLL doesn't lock
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:00 +10:00
Roy Spliet
70c7995d12 drm/nva3/clk: HOST clock
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:00 +10:00
Roy Spliet
6a4a47cfd1 drm/nva3/clk: Set PLL refclk
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:59 +10:00
Roy Spliet
3d896d349e drm/nva3/clk: Parse clock control registers more accurately
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:59 +10:00
Pierre Moreau
17eac85a8c drm/nouveau: Fix duplicate definition of NV04_PFB_BOOT_0_*
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:58 +10:00
Pierre Moreau
703fa264b1 drm/nouveau: Display Nouveau boot options at launch
It can help to remove any ambiguity about which options were passed to Nouveau,
especially in case the user had some options set in /etc/modprobe.d/*.conf that
he forgot about, as they won't appear in a dmesg.

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:58 +10:00
Ben Skeggs
a2410f5a0f drm/nouveau/pwr: wait for scrubbers to finish before uploading new ucode
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:58 +10:00
Martin Peres
4417be553c drm/nouveau/pwr/fuc: make $r1-$r10 registers callee-saved in kernel.fuc
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:57 +10:00
Martin Peres
b9fcf971bf drm/nouveau/pwr/fuc: add ld/st macros
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:57 +10:00
Martin Peres
d5837df18c drm/nouveau/pwr: add helpers for delay-to-ticks and ticks-to-delay
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:56 +10:00
Martin Peres
2befd17de2 drm/nouveau/pwr: add some arith functions (mul32_32_64, subu64 and addu64)
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:56 +10:00