Commit Graph

2 Commits

Author SHA1 Message Date
Dhaval Shah
cee8113a29 soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver
Xilinx ZYNQMP logicoreIP Init driver is based on the new
LogiCoreIP design created. This driver provides the processing system
and programmable logic isolation. Set the frequency based on the clock
information get from the logicoreIP register set.

Signed-off-by: Dhaval Shah <dshah@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-08 13:42:47 +01:00
Michal Simek
5abcdc206f soc: xilinx: Create folder structure for soc specific drivers
Create directory structure with Makefile/Kconfig for adding xilinx soc
specific drivers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-08 13:42:39 +01:00