11096 Commits

Author SHA1 Message Date
Benjamin Herrenschmidt
17e0e27020 [POWERPC] spufs: Fix bitrot of the SPU mmap facility
It looks like we've had some serious bitrot there mostly due to tracking
of address_space's of mmap'ed files getting out of sync with the actual
mmap code. The mfc, mss and psmap were not tracked properly and thus
not invalidated on context switches (oops !)

I also removed the various file->f_mapping = inode->i_mapping;
assignments that were done in the other open() routines since that
is already done for us by __dentry_open.

One improvement we might want to do later is to assign the various
ctx-> fields at mmap time instead of file open/close time so that we
don't call unmap_mapping_range() on thing that have not been mmap'ed

Finally, I added some smp_wmb's after assigning the ctx-> fields to make
sure they are visible to other CPUs. I don't think this is really
necessary as I suspect locking in the fs layer will make that happen
anyway but better safe than sorry.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:54 +11:00
Benjamin Herrenschmidt
44430e0d39 [POWERPC] powerpc: Remove SPU struct pages for PS3
Struct page are no longer needed for SPUs, so let's not create them
on PS3 anymore.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:54 +11:00
Benjamin Herrenschmidt
78bde53e35 [POWERPC] spufs: remove need for struct page for SPEs
This patch removes the need for struct page for SPE local store
and registers from spufs. It also makes the locking much more
obvious and no longer relying on the truncate logic black magic
for protecting against races between unmap_mapping_range() and
new pages faulted in. It does so by switching to a nopfn() handler
and using the new vm_insert_pfn() to setup the PTEs itself while
holding a lock on the SPE.

The nice thing is that this patch actually removes a lot more code
than it adds :-)

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:53 +11:00
Sylvain Munaut
9724b86f07 [POWERPC] Small cleanup of EFIKA platform
The efika platform used three files efika-pci.c efika-setup.c and
a 2 line efika.h to link the two. The total of code in those is
really not much and therefore, I think they're better merged
in a single file.

There is absolutely _no_code_change_ at all, just merged the files.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:53 +11:00
Sylvain Munaut
46e4cf6c14 [POWERPC] Fix unbalanced of_node_{get,put} in efika-setup.c
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:53 +11:00
Sylvain Munaut
82a03b9227 [POWERPC] Use common 52xx of_platform probe code for EFIKA
Now that the device tree has the good properties, we can
remove all the efika_init code by a single call to common code.

While we're modifying that file, a few whitespaces/alignement/typo
fixes are made (nothing significant).

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:53 +11:00
Sylvain Munaut
b6a591b2c5 [POWERPC] Restore 'proper' link order in platform
The 52xx was put before CHRP to allow EFIKA to be recognized
properly. Now the efika tree is fixed up in prom_init so
no need for this ugly hack. So we restore the 'normal'
order.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:53 +11:00
Sylvain Munaut
88fd2a9d68 [POWERPC] Add device tree fixups for the EFIKA
We make the efika device tree compliant with the defined bindings
(at least compliant enough). This is mostly done by mangling
the device_type and compatible properties, but also adding
some missing bits.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:53 +11:00
Grant Likely
05cbbc692f [POWERPC] mpc5200 device tree bindings refinement
Much needed refinement of mpc5200 device tree binding specifications.

Short list:
- drop mpc52xx designator; only two supported chips exist, 5200 and 5200b.
  It's premature to refer to them as '52xx'.
- Specify optional 'model' and 'revision' properties in the soc5200 node
- Specify reqiured 'cell-index' property to identify between multiple SOC
  devices of the same type.  (Useful for arbitrating shared register access)
- Specify optional 'port-number' property for adjusting the logical serial
  port assignments.
- Specify optional 'has-wdt' property for gpt0 node.
- Add system-frequency property to soc5200 node

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:53 +11:00
Grant Likely
e3aba81d15 [POWERPC] Fixup mp5200 drivers to match device tree changes
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:53 +11:00
Stephen Rothwell
40d244d69a [POWERPC] correct a prototype
This rids us of a warning.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:52 +11:00
Stefan Roese
ab9367e38f [POWERPC] ppc: Add support for AMCC Taishan 440GX eval board
This patch adds support for the AMCC Taishan PPC440GX evaluation
board.

This is still an arch/ppc port. I'm aware that the move of
4xx to arch/powerpc is making good progress right now. So this
patch is mainly intended to make the Taishan support available
for the community right now.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:52 +11:00
Benjamin Herrenschmidt
7ac9a13717 [POWERPC] Fix vDSO page count calculation
The recent vDSO consolidation patches broke powerpc due to a mistake
in the definition of MAXPAGES constants. This fixes it by moving to
a dynamically allocated array of pages instead as I don't like much
hard coded size limits. Also move the vdso initialisation to an initcall
since it doesn't really need to be done -that- early.

Applogies for not catching the breakage earlier, Roland _did_ CC me on
his patches a while ago, I got busy with other things and forgot to test
them.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:52 +11:00
Olaf Hering
2d99c41f05 [POWERPC] Mark winbond IDE PCI resources with start 0 as unassigned
libata calls pci_request_regions to claim PCI BAR 0 - 5
pci_request_regions fails if one of the regions cant be claimed.
bar 5 has start == 0,  __request_resource will fail.

Tested on a p630 in SMP mode with pata_sl82c105

 00:03.1 IDE interface: Symphony Labs SL82c105 (rev 05) (prog-if 8f [Master SecP SecO PriP PriO])
         Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B-
         Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
         Interrupt: pin A routed to IRQ 86
         Region 0: I/O ports at 3fd3000f000 [size=8]
         Region 1: I/O ports at 3fd3000f010 [size=4]
         Region 2: I/O ports at 3fd3000f020 [size=8]
         Region 3: I/O ports at 3fd3000f030 [size=4]
         Region 4: I/O ports at 3fd3000f040 [size=16]
         Region 5: I/O ports at 3fd30000000 [size=16]
 00: ad 10 05 01 41 01 80 02 05 8f 01 01 08 48 80 00
 10: 01 f0 00 00 11 f0 00 00 21 f0 00 00 31 f0 00 00
 20: 41 f0 00 00 01 00 00 00 00 00 00 00 00 00 00 00
 30: 00 00 00 00 00 00 00 00 00 00 00 00 56 01 02 28
 40: b3 08 ff 00 09 09 00 00 09 09 00 00 09 09 00 00
 50: 09 09 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 70: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00
 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

 name             "ide"
 linux,phandle    00d5cdc0 (14011840)
 assigned-addresses 81001910 00000000 0000f000 00000000 00000008 81001914
                  00000000 0000f010 00000000 00000004 81001918 00000000
                  0000f020 00000000 00000008 8100191c 00000000 0000f030
                  00000000 00000004 81001920 00000000 0000f040 00000000
                  00000010 81001924 00000000 00000000 00000000 00000010
 interrupts       00000003
 built-in
 #size-cells      00000000
 #address-cells   00000001
 device_type      "ide"
 reg              00001900 00000000 00000000 00000000 00000000
                  41001910 00000000 00000000 00000000 00000008
                  41001914 00000000 00000000 00000000 00000004
                  41001918 00000000 00000000 00000000 00000008
                  4100191c 00000000 00000000 00000000 00000004
                  41001920 00000000 00000000 00000000 00000010
                  41001924 00000000 00000000 00000000 00000010
 compatible       "pci10ad,105"
                  "pciclass,01018f"
 ibm,fw-slot-number 00000000
 fast-back-to-back
 devsel-speed     00000001
 max-latency      00000028 (40)
 min-grant        00000002
 class-code       0001018f (65935)
 revision-id      00000005
 device-id        00000105 (261)
 vendor-id        000010ad (4269)
 ibm,loc-code     "U0.1-P1/Q6"

Signed-off-by: Olaf Hering <olaf@aepfle.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:52 +11:00
Akira Iguchi
cbca567ea5 [POWERPC] Celleb: improve MMU hashtable locking
Disabling IRQ is required only in invalidation.  This changes
"spin_lock_irqsave" to "spin_lock" in other ops.

Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp>
Signed-off-by: Akira Iguchi <akira2.iguchi@toshiba.co.jp>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 15:35:51 +11:00
David Gibson
1f1fec9458 [POWERPC] Remove ibm4{xx,4x}.h from arch/powerpc
ARCH=powerpc should not use the ghastly un-multiplatformable tangle of
includes that starts with asm-ppc/ibm4xx.h.  This patch removes a
compile-breaking include of it from head_44x.S.

Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-13 14:59:52 +11:00
Becky Bruce
8ce0a7df6e [POWERPC] 85xx: Don't write reserved values to MAS1[TSIZE]
Some of the current tlbwe instructions early on in head_fsl_booke.S take
advantage of unarchitected behavior that allows the writing of reserved
values to the TSIZE field.  This patch corrects that, as well as an error
where an uninitialized (by linux) value was written into a MAS register and
used for a tlbwe.

Correct this for both arch/ppc and arch/powerpc.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-02-12 21:32:38 -06:00
Kumar Gala
edacf6bb7e Merge branch 'master' into 85xx 2007-02-12 21:27:10 -06:00
Paul Mackerras
fe6af6faec Merge branch 'for_paulus' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc 2007-02-13 13:28:00 +11:00
Paul Mundt
ca43ecbf6e sh: Kill dead/unused ISA code from __ioremap().
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:46 +09:00
Paul Mundt
b37814352d sh: Fix syscall numbering breakage.
We accidentally broke the inotify syscalls, fix those up again.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:46 +09:00
Paul Mundt
5904539b7f sh: dcache write-back for R7780RP PIO.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:45 +09:00
Paul Mundt
0072032d7b sh: Switch to local TLB flush variants in additional callsites.
Convert some of the global flush users over to using the local variants
that don't need to use the global routines.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:45 +09:00
Paul Mundt
ea9af69481 sh: Local TLB flushing variants for SMP prep.
Rename the existing flush routines to local_ variants for use by
the IPI-backed global flush routines on SMP.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:45 +09:00
Paul Mundt
11c1965687 sh: Fixup cpu_data references for the non-boot CPUs.
There are a lot of bogus cpu_data-> references that only end up working
for the boot CPU, convert these to current_cpu_data to fixup SMP.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:45 +09:00
Paul Mundt
aec5e0e1c1 sh: Use a per-cpu ASID cache.
Previously this was implemented using a global cache, cache
this per-CPU instead and bump up the number of context IDs to
match NR_CPUS.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:45 +09:00
Andrew Morton
506b85f411 sh: add SH_CLK_MD Kconfig default.
This option needs a default - otherwise `make allmodconfig' gets
stuck in an infinite loop.

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:45 +09:00
Nobuhiro Iwamatsu
dbbfa2da27 sh: Fixup SHMIN INTC register definitions.
Signed-off-by: Nobuhiro Iwamatsu <hemamu@t-base.ne.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:45 +09:00
Manuel Lauss
9f8a5e3a44 sh: SH-DMAC compile fixes
This patch does the following:
- remove the make_ipr_irq stuff from dma-sh.c and replace it
  with a simple channel<->irq mapping table.
- add DMTEx_IRQ constants for sh4 cpus
- fix sh7751 DMAE irq number

The SH7780 uses the same IRQs for DMA as other SH4 types, so
I put the constants on top of the dma.h file.

Other CPU types need to #define their own DMTEx_IRQ contants
in their appropriate header.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:45 +09:00
Manuel Lauss
6dcda6f1ec sh: add SH7760 IPR IRQ data
Add SH7760 IPR IRQ data; makes 2.6.20-rc bootable again.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:45 +09:00
Nobuhiro Iwamatsu
86b67ef751 sh: Fix handle_BUG() compile error.
handle_BUG() uses TRAPA_BUG_OPCODE which is only defined for
CONFIG_BUG, make sure it's not built when CONFIG_BUG=n.

Signed-off-by: Nobuhiro Iwamatsu <hemamu@t-base.ne.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:45 +09:00
Paul Mundt
adac957096 sh: Don't set reserved _PAGE_WT bit on SH-3.
Only SH-4 needs to set _PAGE_WT when using write-through caching,
don't attempt to set it on SH-3 where it ends up being a reserved
bit.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:44 +09:00
Paul Mundt
26b7a78c55 sh: Lazy dcache writeback optimizations.
This converts the lazy dcache handling to the model described in
Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks
used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a
bonus, this slightly cuts down on the cache flushing frequency.

With that and the PTEA handling out of the way, the update_mmu_cache()
implementations can be consolidated, and we no longer have to worry
about which configuration the cache is in for the SH7705 case.

And finally, explicitly disable the lazy writeback on SMP (SH-4A).

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:44 +09:00
Paul Mundt
7a847f8190 sh: More tidying for large base pages.
There were a few more things that needed fixing up, namely THREAD_SIZE
and the TLB miss handler where certain PTRS_PER_PGD == PTRS_PER_PTE
assumptions were being made.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:44 +09:00
Nobuhiro Iwamatsu
aa4a5db52a sh: Solution Engine 770x IPR irq setup.
Fixups for external IPR IRQs for the SE770x FPGA.

Signed-off-by: Nobuhiro Iwamatsu <hemamu@t-base.ne.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:44 +09:00
Nobuhiro Iwamatsu
08d2e099fb sh: Solution Engine 7750's defconfig update.
Update se7750_defconfig.

Signed-off-by: Nobuhiro Iwamatsu <hemamu@t-base.ne.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:44 +09:00
Takashi YOSHII
f725b5ee1e sh: shmin updates.
This fixes up shmin (and SH7706/SH7708) IPR support for some of the
recent API changes.

Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:44 +09:00
Paul Mundt
2c081e71ba sh: Fixup R7780RP iVDR clock enable.
The iVDR clock enable bit happens to actually reside in a rather
different place than what is documented, so fix it up accordingly.
This fixes up SATA boot for some of the R7780RP boards that didn't
default-enable the clock in the loader.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:44 +09:00
Jamie Lenehan
703404ea44 sh: allow earlyprintk baud rate to be set via command line
This allows the baud rate for earlyprintk for sh4 without the
standard BIOS to be set via the command line. This uses the same
format as i386 and x86_64, which is:

	earlyprintk=serial,ttySC1,38400

The second parameter (ttySC1 above) is usually the console device
name or the io address of the serial port. I allow that to be
specified but ignore it in order to keep the format the same as
i386/x86_64.

Signed-off-by: Jamie Lenehan <lenehan@twibble.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:44 +09:00
Yoshinori Sato
5c67cd05e3 sh: sh7619 / sh7206 IPR initialize update
IPR initialize proceduere update.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:43 +09:00
Yoshinori Sato
4aa362bbdd sh: Update SH-2 to use the debug trap jump table.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:43 +09:00
Paul Mundt
702dd80375 sh: Use proper SH-2A CFLAGS on newer compilers.
-m2 doesn't end up working particularly well when we've got a constrained
toolchain target. Switch to the same semantics used by SH-4A to attempt
to get it right. Spotted by Alex Song <songqf9@yahoo.ca>.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:43 +09:00
Paul Mundt
f413d0d9fa sh: Use a jump call table for debug trap handlers.
This rips out most of the needlessly complicated sh_bios and kgdb
trap handling, and forces it all through a common fast dispatch path.
As more debug traps are inserted, it's important to keep them in sync
for all of the parts, not just SH-3/4.

As the SH-2 parts are unable to do traps in the >= 0x40 range, we
restrict the debug traps to the 0x30-0x3f range on all parts, and
also bump the kgdb breakpoint trap down in to this range (from 0xff
to 0x3c) so it's possible to use for nommu.

Optionally, this table can be padded out to catch spurious traps for
SH-3/4, but we don't do that yet..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13 10:54:43 +09:00
David S. Miller
34cc560e6a [SPARC]: Re-export saved_command_line to modules.
This reverts some bogosity from the dynamic command-line
changes made on sparc32 and sparc64.

Drivers such as drivers/sbus/char/openprom.c reference
saved_command_line, and can be modular.

The boot_command_line is __initdata, yet the dynamic command-line
changes add modular exports of that symbol, obviously wrong.

Signed-off-by: David S. Miller <davem@davemloft.net>
2007-02-12 15:15:48 -08:00
David S. Miller
1b51d3a08b [SPARC64]: We do not need ZONE_DMA.
Signed-off-by: David S. Miller <davem@davemloft.net>
2007-02-12 15:15:46 -08:00
Linus Torvalds
ebaf0c6032 Merge branch 'for-linus' of git://git390.osdl.marist.edu/pub/scm/linux-2.6
* 'for-linus' of git://git390.osdl.marist.edu/pub/scm/linux-2.6:
  [S390] remove __io_virt and mmiowb.
  [S390] cio: use ARRAY_SIZE in device_id.c
  [S390] cio: Fixup interface for setting options on ccw devices.
  [S390] smp_call_function/smp_call_function_on locking.
2007-02-12 09:57:44 -08:00
Arjan van de Ven
754661f143 [PATCH] mark struct inode_operations const 1
Many struct inode_operations in the kernel can be "const".  Marking them const
moves these to the .rodata section, which avoids false sharing with potential
dirty data.  In addition it'll catch accidental writes at compile time to
these shared resources.

Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-02-12 09:48:46 -08:00
Arjan van de Ven
9c2e08c592 [PATCH] mark struct file_operations const 9
Many struct file_operations in the kernel can be "const".  Marking them const
moves these to the .rodata section, which avoids false sharing with potential
dirty data.  In addition it'll catch accidental writes at compile time to
these shared resources.

Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-02-12 09:48:46 -08:00
Arjan van de Ven
5dfe4c964a [PATCH] mark struct file_operations const 2
Many struct file_operations in the kernel can be "const".  Marking them const
moves these to the .rodata section, which avoids false sharing with potential
dirty data.  In addition it'll catch accidental writes at compile time to
these shared resources.

[akpm@osdl.org: sparc64 fix]
Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-02-12 09:48:44 -08:00
Geert Uytterhoeven
f59e5e8209 [PATCH] ps3: ps3av/fb defconfig updates
PS3: defconfig updates for ps3av and ps3fb

Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
Cc: James Simmons <jsimmons@infradead.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-02-12 09:48:44 -08:00