DPRINTF() is used in hw specific related code, as such
ensure we don't rely on the private driver core ath_softc
struct when calling it. Drivers can then implement their
own DPRINTF() as they see fit.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch fixes a embarrassing bug which was introduced by:
"[PATCH] ar9170: implement frequency calibration for one-stage/openfw"
The phy_data variable initialization has to done outside the for-loop
scope. This is because the for-loop uses u32 phy_data variable more
like a 4-byte field. But in each run only a single byte is calculated.
Therefore phy_data content needs to stay the same for at least 3 more
iterations, before the complete set can be uploaded.
Reported-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch fixes 2 issues in RFKILL:
* Calling wiphy_rfkill_stop_polling() in ath9k_stop
would mean that the driver cannot report HW status
when the radio is re-enabled. Move this to ath_detach().
* Calling ath_radio_{enable/disable} without checking the current
state results in ath_radio_enable() being called repeatedly
for every invocation of rfkill_poll(). This is not needed
in any case since wiphy_rfkill_set_hw_state() would call
->stop() if the radio has been disabled.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch adds the usbid for TP-Link TL-WN821N v2.
Cc: stable@kernel.org
Reported-by: Fabian Lenz <lenz_fabian@yahoo.de>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Autosleep needs to be disabled for AR9287 chipsets also.
Since autosleep is not used for any of the currently supported
chipsets, disable it by default and can be enabled if needed
for any of the future chipsets.
Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
The commit "ath9k: Fix bugs in programming registers during PA CAL"
removed a REG_READ of 0x7834. This resulted in incorrect
computation of the subsequent value to be written in RF2G6.
This patch fixes the regression by re-adding the REG_READ.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
* This patch fixes a bug in calculating the scaled
power for three chain chipsets.
* Also, a delay is needed after setting DAC low-power mode in
TOP1 RF register (Top Level Register Bits).
Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
The commit "ath9k: Do an AHB reset before doing RTC reset"
fixed RTC reset issue for AR9280 2.0 chipsets and above.
The fix is valid for all AR9280 chipsets.
Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This is needed to account for the number of chains in use,
not just the number of chains present.
Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
AR9280 requires a full reset during channel change and HW reset.
Currently, a fast channel change is done. This patch fixes
this bug.
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
NF value may be incorrect when we read it just after the chip
has gone through a full sleep mode. Reading incorrect NF values
affects RX throughput.
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Setting bit 20 and 25 of 0x8344 can cause occasional rx data
corruption, clear them to fix this issue.
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Waking up the chip after powering it down fails sometimes.
In this case the CPU is locked for 200ms. Reduce this
interval to 10ms to avoid excessive busy looping.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
For chips requiring RTC reset, TSF has to be restored
after power on reset.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
* Disable L1 state ONLY when device is in D3 mode.
* Clear bit 22 of register 0x4004.
* Handle power on/off properly
Not setting the workarounds properly resulted in the
disappearance of the card in certain cases.
Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
The default noise floor was never initialized for
AR9287.This patch helps in reporting the correct
RSSI for this version of chipset.
Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
When processing MIB interrupts, OFDM and CCK error
handling routines for low RSSI values have to be invoked
only when the channel mode is 11G/11B. Since HT channels
will also fall under the bands 2Ghz/5Ghz, check appropriately.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
When processing MIB interrupts, OFDM and CCK error
handling routines for low RSSI values have to be invoked
only when the channel mode is 11G/11B. Since HT channels
will also fall under the bands 2Ghz/5Ghz, check appropriately.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Oops, a stupid mistake in the original patch which adds coex 3-wire
support. Bluetooth priority gpio needs to be gpio 7.
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This subsystem id will be used later to turn on the btcoex
support.
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
apply the conformance test limits (CTL) stored in the eeprom upon
the values calculated for the tx power (ar->power_*).
This is based on the implementation in the vendor driver
(hal/hpmain.c, line 3700 ff.) with one difference:
If any ctl mode isn't found in the eeprom, we fall back to the "lower",
legacy modes (5GHT20,11A or 2GHT20,11G,11B). Otus only did 5GHT20->11A.
Currently CTL are applied for the FCC group only.
Signed-off-by: Joerg Albert <jal2@gmx.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
The ar9170 driver needs the defines for conformance test limit groups
and cannot include regd_common.h
Signed-off-by: Joerg Albert <jal2@gmx.de>
Acked-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch ports some code from the vendor driver, which is
supposed to upload the right calibration values for the
chosen frequency.
In theory, this should give a better range and throughput
for all users with the open, or one-stage firmware.
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
CHANNEL_G has to be set for 2GHZ channels since
IS_CHAN_G() checks for this in channelFlags and not in
chanmode. To make things messier, ath9k_hw_process_ini()
checks for CHANNEL_G in chanmode and not in channelFlags.
The supreme, brain-searing fix is to set the
flag in both cases.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
BAR frames have to be sent to mac80211 only if the
current channel is HT. Also, move the macro to
enum ath9k_rx_filter.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
ath9k ahb requests an IRQ and indicates 'ath9k' claimed it,
ath9k pci requests an IRQ and indicates 'ath' claims it;
since 'ath' is another module sync both ahb and pci to claim
the irq using 'ath9k'.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
We've cleaned up ath_init_device() and its children enough
to pass meaninful errors back from probe. When this fails
it means our device could not be initialized and a meaninful
error will have been passed.
Do the same for request_irq() and also synchronize the error
messages while at it.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
The -ENOMEM was never being passed on failure.
While at it use dev_err() as ahb does upon failure.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch adds the initialisation of some PHY registers
from the modal_header[] values in the EEPROM
(see otus/hal/hpmain.c, line 333 ff.)
Signed-off-by: Joerg Albert <jal2@gmx.de>
Acked-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
As generic hw timer interrupt handler is moved to tasklet,
we no more need to call spin_lock_irqsave().
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
There is no point handling this in hard irq, move it to
tasklet.
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Doing an RTC reset when DMA is active may corrupt memory,
make sure no DMA is active at this moment by doing an
AHB reset.
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
AR5K_SREV is available even if the chip has been put to sleep. Relying
on the chip register allows binding non-standard PCI IDs by
echo VENDOR_ID PRODUCT_ID >/sys/bus/pci/drivers/ath5k/new_id
without having to specify the driver data as well.
Signed-off-by: Pavel Roskin <proski@gnu.org>
Acked-by: Bob Copeland <me@bobcopeland.com>
Acked-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
The `val' variable in ath5k_eeprom_read_turbo_modes() is used
uninitialized. gcc 4.4.1 with -fno-inline-functions-called-once reports
it:
eeprom.c: In function 'ath5k_eeprom_read_turbo_modes':
eeprom.c:441: warning: 'val' may be used uninitialized in this function
Comparing the code to the Atheros HAL, it's clear that the split between
ath5k_eeprom_read_modes() and ath5k_eeprom_read_turbo_modes() was
incorrect.
The Atheros HAL reads both turbo and non-turbo data from EEPROM in one
function. Some turbo mode parameters are derived from the same EEPROM
values as non-turbo parameters, just from different bits.
Merge ath5k_eeprom_read_turbo_modes() into ath5k_eeprom_read_modes() to
fix the warning. The actual values and offsets have been cross-checked
against Atheros HAL.
Signed-off-by: Pavel Roskin <proski@gnu.org>
Acked-by: Bob Copeland <me@bobcopeland.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
As Pavel Roskin noted, the check for mac version as copied from
legacy_hal made no sense. This replaces it with the equivalent
and makes up a suitable #define for the mac version legacy_hal
checked.
Signed-off-by: Bob Copeland <me@bobcopeland.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch adds 3-wire bluetooth coex support for AR9285.
This support can be enabled through btcoex_enable modparam.
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
We don't need a hw cap bit for btcoex anymore as btcoex scheme type
is enough to do this.
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Also define macros for wlanactive and btactive (5 & 6) gpios.
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Make sure btcoex register configured with appropriate values
after it is initialized with the default values from initvals.h
during reset.
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
