ide_config_drive_speed() called by sc1200_set_xfer_mode() already gives
a meaningful warning message in case of failure.
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Add { 0, 0 } entry to {kauai,shasta}_pio_timings[] so kauai_lookup_timing()
always returns a valid PIO timing (fixes PIO timing not being set for devices
with minimum PIO cycle <= 120ns).
* Add setting transfer mode on the device to pmac_ide_set_pio_mode().
* Fix pmac_ide_set_pio() to always program chipset for given PIO timing instead
of only when the device we want to program PIO timing for is the currently
selected one.
* Now that pmac_ide_set_pio() is fixed there is no need to set transfer mode
on the device and program chipset for PIO in pmac_ide_tune_chipset()
(returning 0 == success is not entirely correct but is OK for now since
the upper layers are only checking ->speedproc return value for DMA modes).
v2:
* s/speed/XFER_PIO_0 + pio/ in pmac_ide_set_pio_mode() so it actually compiles.
* Removal of kauai_lookup_timing() return value checking went to separate patch.
v3:
* Use XFER_PIO_0 not XFER_PIO. (Noticed by Ben)
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* All other implementations of ->speedproc return zero on success
and non-zero on failure. Currently it doesn't matter for icside host
driver and isn't a bug per se since:
- ide_set_xfer_rate() return value is ignored by all IDE core users
- icside doesn't (yet!) use ide_tune_dma() in icside_dma_check()
but sooner or later we will need to fix anyway - so lets do it now.
* icside_set_speed() happily accepts unsupported transfer modes which
results in drive->drive_data being set to the maximum value (480)
and drive->current_speed being set to the unsupported transfer mode.
Fix it.
v2:
* The initial version of the patch was broken because it didn't take into
the account (the different from usual) return values of icside_set_speed()
(Noticed by Russell).
v3:
* Remove no longer needed initialization/checking of cycle_time
(Noticed by Sergei).
* No need to set drive->drive_data if DMA is not going to be used
(Noticed by Sergei).
* Remove incorrect setting of drive->current_speed
(Noticed by Sergei).
* Move ide_config_drive_speed() at the end of icside_set_speed().
v4:
* If DMA mode is not found in icside_dma_check() then just return "-1" and
don't call icside_set_speed() (v3 got it wrong and "1" was returned instead).
v5:
* Return "-1"/"0" in icside_set_speed() instead of icside_dma_check() return
value (just like it was before this patch).
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Add DRV_NAME define and use it instead of sgiioc4_chipset.name.
* Remove no longer needed sgiioc4_chipset.
* Remove needless clearing of ->atapi_dma from ide_dma_sgiioc4().
* Fix ide_dma_sgiioc4() to return success/failure. Check return value in
sgiioc4_ide_setup_pci_device() and set hwif->autodma accordingly. Also add
missing setting of drive->autodma.
* Add sgiioc4_speedproc() (implementation of ->speedproc method).
* Fix ->mwdma_mask (MWDMA2 mask is 0x04 not 0x02) and remove incorrect
->swdma_mask. Also remove needless initialization of ->ultra_mask.
* Use ide_tune_dma() in sgiioc4_ide_dma_check(), this fixes following bugs:
- DMA capability bit not being checked on the device
- DMA blacklist not being checked
- MWDMA2 mode support by device not being checked
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeremy Higdon <jeremy@sgi.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Use ide_tune_dma() in amd74xx/via82cxxx driver, this fixes following bugs:
- DMA capability bit not being checked on the device
- DMA blacklist not being checked
- DMA mode being programmed even if drive->autodma == 0
(thus possibly destroying PIO timings)
* Bump driver version.
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Add IDE_HFLAG_ABUSE_{PREFETCH,FAST_DEVSEL,DMA_MODES} flags
and set them in ht6560, cmd640, cmd64x and sc1200 host drivers.
* Add set_pio_mode_abuse() for checking if host driver has a non-standard
->tuneproc() implementation and use it in do_special().
* Add ide_set_pio() for setting PIO mode (it uses hwif->pio_mask to find
the maximum PIO mode supported by the host), also add ide_set_max_pio()
wrapper for ide_set_pio() to use for auto-tuning. Convert users of
->tuneproc to use ide_set{_max}_pio() where possible. This leaves only
do_special(), set_using_pio(), ide_hwif_restore() and ide_set_pio() as
a direct users of ->tuneproc.
* Remove no longer needed ide_get_best_pio_mode() calls and printk-s
reporting PIO mode selected from ->tuneproc implementations.
* Rename ->tuneproc hook to ->set_pio_mode and make 'pio' argument const.
* Remove stale comment from ide_config_drive_speed().
v2:
* Fix "ata_" prefix (Noticed by Jeff).
v3:
* Minor cleanups/fixups per Sergei's suggestions.
v4:
* Fix compile problem in drivers/ide/pci/cmd640.c
(Noticed by Andrew Morton).
* Improve some ->set_pio_mode comments.
Reviewed-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Jeff Garzik <jeff@garzik.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Convert config options for PCI host drivers to select BLK_DEV_IDEPCI.
* Same for BLK_DEV_IDEDMA_PCI and PCI DMA host drivers, also make this
config option select BLK_DEV_IDEPCI.
* Remove no longer needed help for BLK_DEV_IDEPCI and BLK_DEV_IDEDMA_PCI.
* Remove redundant IDE_CHIPSETS config option.
As a result of this patch users have now three less config options
to worry about and can just select host drivers that they need
(IDE config menu is "flatter").
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Move ide_rate_filter() calls from host drivers to IDE core.
* Make ide_rate_filter() static.
* Make 'speed' argument of ->speedproc const.
v2:
* Fix it8213_tune_chipset() comment.
There should be no functionality changes caused by this patch.
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Add sis5513_ata133_udma_filter() for chipset_family >= ATA_133,
use it to filter UDMA6 mode if ATA133 bit is disabled.
* Remove no longer needed UDMA6 limiting logic from sis5513_tune_chipset().
* Bump driver version.
There should be no functionality changes caused by this patch.
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Add an extra argument to ide_max_dma_mode() for passing requested transfer
mode. Use it as an upper limit when finding the best DMA for device/host.
* Rename ide_max_dma_mode() to ide_find_dma_mode() and at the same time add
ide_max_dma_mode() wrapper which passes XFER_UDMA_6 as a requested mode to
ide_find_dma_mode(). Also add inline ide_find_dma_mode() version for
CONFIG_BLK_DEV_IDEDMA=n case.
* Pass requested transfer mode from ide_find_dma_mode() to ide_get_mode_mask()
to avoid false warning from eighty_ninty_three().
* Use ide_find_dma_mode() to limit the user requested transfer mode in
ide_rate_filter(). Also limit the requested mode by host max PIO mode.
Above changes make ide_rate_filter() to:
* Clip desired transfer mode down if it is invalid (values 0x0F, 0x13-0x19
and 0x25-0x39, values > 0x46 were already clipped down, same for values
0x25-0x39 but iff UDMA was not supported by the host).
* Clip desired transfer mode down if it is currently unsupported by IDE core
(PIO6 and MWDMA3-4, the latter were already clipped down but iff UDMA was
not supported by the host).
* Clip desired transfer mode down according to the host capabilities
(UDMA modes were already clipped down but MWDMA/SWDMA/PIO weren't,
also ->atapi_dma flag was not respected).
* Clip desired transfer mode down according to the device capabilities
(except PIO modes for now which require mode work) - shouldn't be a
problem since ide_set_xfer_rate() is called _after_ device has accepted
given transfer mode.
and also result in a number of host driver specific bugfixes:
* icside
- clip unsupported PIO5 mode down
- fix unsupported/invalid modes being set in drive->current_speed
* ide-cris
- clip unsupported PIO5 and SWDMA0-2 modes down
- clip DMA modes down for ATAPI devices
- fix BUG() on unsupported/invalid modes
* au1xxx-ide
- clip unsupported PIO5, SWDMA0-2 and MWDMA0-2
(if BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA=n) modes down
* aec62xx
- clip unsupported PIO5 and SWDMA0-2 modes down
- clip DMA modes down for ATAPI devices
- fix 0x00 being programmed as PIO timing for unsupported/invalid modes
- fix unsupported/invalid modes being set on the device
* alim15x3
- clip DMA modes down for ATAPI devices (chipset revision == 0x20 only)
- fix theoretical OOPS for 0x0F mode
- fix unsupported/invalid modes being set on the device
* amd74xx
- clip unsupported SWDMA0-2 (on COBRA_7401 revs <= 7) modes down
- fix random PIO timings being set for unsupported/invalid modes
- fix unsupported/invalid modes being set on the device
* atiixp
- clip unsupported PIO5 and SWDMA0-2 modes down
- fix cached MWDMA mode being cleared for unsupported/invalid modes
- fix PIO{0,2} timings being programmed for unsupported/invalid modes
- fix theoretical OOPS for PIO5-6 and 0x0F modes
- fix unsupported/invalid modes being set on the device
* cmd64x
- clip unsupported SWDMA0-2 modes down
* cs5530
- clip unsupported PIO5 and SWDMA0-2 modes down
- fix unsupported/invalid modes being set on the device
- fix BUG() on unsupported/invalid modes
(which happened if the device accepted the setting)
* cs5535
- clip unsupported PIO5 and SWDMA0-2 modes down
- fix unsupported/invalid modes being set on the device
- fix theoretical OOPS for PIO5-6 and 0x0F modes
* hpt34x
- clip DMA modes down for ATAPI devices
- fix invalid timings being programmed for unsupported/invalid modes
- fix unsupported/invalid modes being set on the device
* hpt366
- clip unsupported PIO5 and SWDMA0-2 modes down
- fix PIO0 timings being programmed for unsupported/invalid modes
- fix DMA timings being cleared for MWDMA3-4 and 0x25-0x39 modes
- fix unsupported/invalid modes being set on the device
* it8213
- clip unsupported PIO5, SWDMA0-1 and MWDMA0 modes down
* it821x
- clip unsupported PIO5 and SWDMA0-2 modes down
- clip DMA modes down for ATAPI devices
(chipset in smart mode and revision 0x10 in pass-through mode)
* jmicron
- clip unsupported SWDMA0-2 modes down
- fix unsupported/invalid modes being set on the device
* pdc202xx_new
- clip unsupported PIO5 and SWDMA0-2 modes down
- fix unsupported/invalid modes being set on the device
* pdc202xx_old
- clip unsupported PIO5 mode down
- fix incorrect timings being set for unsupported/invalid modes
- fix unsupported/invalid modes being set on the device
* piix
- clip unsupported PIO5, SWDMA0-1 and MWDMA0 modes down
* sc1200
- clip unsupported PIO5 and SWDMA0-2 modes down
- fix unsupported/invalid modes being set on the device
- fix BUG() on unsupported/invalid modes
(which happened if the device accepted the setting)
* scc_pata
- clip unsupported PIO5, SWDMA0-2 and MWDMA0-2 modes down
* serverworks
- clip unsupported PIO5 and SWDMA0-2 modes down
- fix DMA/UDMA timings/settings being cleared for unsupported/invalid modes
- fix unsupported/invalid modes being set on the device
* siimage
- clip unsupported PIO5 and SWDMA0-2 modes down
- clip DMA modes down for ATAPI devices (SATA chipsets)
* sis5513
- clip unsupported PIO5 mode down
- fix BUG() on unsupported/invalid modes
* sl82c105
- clip unsupported SWDMA0-2 modes down
* slc90e66
- clip unsupported PIO5, SWDMA0-1 and MWDMA0 modes down
* tc86c001
- clip unsupported PIO5 and SWDMA0-2 modes down
- fix PIO0 timings being programmed for PIO5/0x0F/SWDMA0-2/0x13-0x19 modes
- fix invalid 0x00 DMA timing being programmed for MWDMA3-4/0x25-0x39 modes
- fix unsupported/invalid modes being set on the device
* triflex
- clip unsupported PIO5 mode down
* via82cxxx
- fix random PIO timings being set for unsupported/invalid modes
- fix unsupported/invalid modes being set on the device
* pmac
- clip unsupported PIO5 and SWDMA0-2 modes down
* cmd640/ht6560b
- clip DMA modes down (if CONFIG_BLK_DEV_IDEDMA=y)
- fix PIO5 being clipped to PIO4 (if CONFIG_BLK_DEV_IDEDMA=n)
* opti621
- clip DMA modes down (if CONFIG_BLK_DEV_IDEDMA=y)
- clip unsupported PIO4 to PIO3 (if CONFIG_BLK_DEV_IDEDMA=n)
While at it:
* Use ide_rate_filter() in cs5520.c::cs5520_tune_chipset().
* Remove no longer needed checks from hpt366.c::hpt3{6,7}x_tune_chipset().
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Fix icside, cris-ide, au1xxx-ide, amd74xx, via82cxxx and pmac host drivers
to use ide_rate_filter().
This results in the following modes (from user requests) being clipped down:
- invalid modes (values 0x46-0xFF) [ for all hosts ]
- unsupported by a host UDMA modes [ for hosts which support UDMA]
- all UDMA modes and MWDMA3-4 modes [ for hosts which don't support UDMA ]
- invalid modes (values 0x25-0x39) [ for hosts which don't support UDMA ]
* Host driver specific changes in behavior:
icside:
- no change
cris-ide
- clip unsupported UDMA3-6 modes down
- fix BUG() on trying to set unsupported UDMA3-6 modes
au1xxx-ide/pmac
- clip unsupported UDMA modes down
amd74xx/via82cxxx
- clip unsupported UDMA modes down
- fix random PIO timings being set for unsupported/invalid modes
- fix unsupported/invalid modes being set on the device
* While at it remove no longer needed checks from pmac.c driver.
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Give the udma_filter() method call precedence over using the mode masks.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
PATA part of all current JMB controllers behave the same way and
JMicron confirms that all future ones will stay compatible. Matching
vendor and device class is enough.
For backward compatibility, jmicron still needs to match 361,3,5,6,8
DIDs regardless of device class if libata is not configured but won't
need further DID update from this point.
Bart: cosmetic fixes to jmicron_chipset
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Ethan Hsiao <ethanhsiao@jmicron.com>
Cc: Justin Tsai <justin@jmicron.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Switch to using pci_get_slot() in init_setup_pdc20270() to get to the mate chip
behind DC21150 bridge as there's no need for the driver itself to walk the list
of the PCI devices (and the driver didn't check the bus # of the found device).
While at it, make it emit warning about IRQ # being fixed up (just like hpt366.c
does) and "beautify" this whole function as well as init_setup_pdc20276()...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
ACPI spec defines the sequence of IDE power on/off:
Powering down:
Call _GTM.
Power down drive (calls _PS3 method and turns off power planes).
Powering up:
Power up drive (calls _PS0 method if present and turns on power planes).
Call _STM passing info from _GTM (possibly modified), with ID data from
each drive.
Initialize the channel.
May modify the results of _GTF.
For each drive:
Call _GTF.
Execute task file (possibly modified).
This patch adds the missed _PS0/_PS3 methods call.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Acked-by: Len Brown <len.brown@intel.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This is now very similar to pata_platform.c, they both use
same platform data structure and same resources.
To achieve that, byte_lanes_swapping platform data variable
and platform specified iops removed from that driver. It's fine,
since those were never used anyway.
pata_platform and ide_platform are carrying same driver names,
to easily switch between these drivers, without need to touch
platform code.
Bart:
- build fix from Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Alan Cox <alan@redhat.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
The Marvell bridge chips used on HighPoint SATA cards do not seem to support
the MWDMA modes (at least that could be seen in their so-called drivers :-),
so the driver needs to account for this -- to achieve this:
- add mdma_filter() method from the original patch by Bartlomiej Zolnierkiewicz
with his consent;
- install the method for all chips to only return empty mask if a SATA drive
is detected on HPT372{AN]/374 chips...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
SB700 supports one physical IDE channel, but SB700 SATA controller
supports combined mode. When the SATA combined mode is enabled,
two SATA ports (port4 and port5) share one IDE channel from IDE
controller, and PATA will share the other IDE channel.
Our previous patch adding SB700 IDE device ID only supports one
IDE channel, which contains bug. The attached patch fixes the bug.
Signed-off-by: "Shane Huang" <Shane.Huang@amd.com>
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
From RFC 3493, Section 5.2:
IPV6_MULTICAST_IF
Set the interface to use for outgoing multicast packets. The
argument is the index of the interface to use. If the
interface index is specified as zero, the system selects the
interface (for example, by looking up the address in a routing
table and using the resulting interface).
This patch adds support for (index == 0) to reset the value to it's
original state, allowing the system to choose the best interface. IPv4
already behaves this way.
Signed-off-by: Brian Haley <brian.haley@hp.com>
Acked-by: David L Stevens <dlstevens@us.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The patch will add MODULE_ALIAS("ip6t_<modulename>") where missing,
otherwise you will get
ip6tables: No chain/target/match by that name
when xt_<modulename> is not already loaded.
Signed-off-by: Jan Engelhardt <jengelh@computergmbh.de>
Signed-off-by: Patrick McHardy <kaber@trash.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
With your description I could reproduce the bug and actually you were
completely right: the code above is incorrect. Somehow I was able to
misread RFC1122 and mixed the roles :-(:
When a connection is >>closed actively<<, it MUST linger in
TIME-WAIT state for a time 2xMSL (Maximum Segment Lifetime).
However, it MAY >>accept<< a new SYN from the remote TCP to
reopen the connection directly from TIME-WAIT state, if it:
[...]
The fix is as follows: if the receiver initiated an active close, then the
sender may reopen the connection - otherwise try to figure out if we hold
a dead connection.
Signed-off-by: Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
Tested-by: Krzysztof Piotr Oledzki <ole@ans.pl>
Signed-off-by: Patrick McHardy <kaber@trash.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
Convert the corgi backlight driver to a more generic version
so it can be reused by other code rather than being Zaurus/PXA
specific.
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
This patch adds support for powering on and off the Samsung LTV350QV LCD
panel via SPI. The driver responds to framebuffer power management, it
powers off the panel on reboot/halt/poweroff. It can also be controlled
through sysfs. The panel is powered up when the module is loaded, and off
when the module is unloaded. Verified on AVR32 STK1000.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
After fixing the too small memory allocation in cr_backlight_probe()
from drivers/video/backlight/cr_bllcd.c
(commit e3bbb3f053) I noticed that the
Coverity checker also thought there were a few memory leaks in there.
I took a closer look and confirmed that there were indeed several
leaks.
At the start of the function we allocate storage for a
'struct cr_panel' and store the pointer in a variable named 'crp'.
Then we call pci_get_device() and pci_read_config_byte() and if
either of them fail we return without freeing the memory allocated
for the 'struct cr_panel'. These two leaks are easy to fix since we
don't even use 'crp' for anything up to this point, so I simply
moved the allocation further down in the function so it only happens
just before we actually need it.
A bit further down we call backlight_device_register() and store the
result in 'crp->cr_backlight_device'. In case of error we return
'crp->cr_backlight_device' from the function, thus leaking 'crp'
itself. The same thing happens with the call to lcd_device_register().
To fix these two leaks I declare two new pointers to hold the return
values, so that in case of error we can return the pointer (as before)
but without leaking 'crp'.
This version of the patch also adds missing
backlight_device_unregister() / lcd_device_unregister() / pci_dev_put()
calls to error paths.
Thanks to Richard Purdie <rpurdie@rpsys.net> for noticing.
Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
This patch makes two needlessly global structs static.
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Update Cobalt Qube series front LED support.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
The leds-cobalt driver only supports the Coable Qube series
(not included in Cobalt Raq series).
Rename the driver and update Kconfig/Makefile.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Acked-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
This patch adds basic support for the new 405EX and the AMCC eval board
Kilauea to arch/powerpc.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
I get a compilation error in sglist-arch branch
with BLK_DEV_IO_TRACE=n:
CC block/compat_ioctl.o
/usr0/export/dev/bharrosh/git/pub/linux-2.6-block/block/compat_ioctl.c: In
function ?compat_blk_trace_setup?:
/usr0/export/dev/bharrosh/git/pub/linux-2.6-block/block/compat_ioctl.c:568:
error: expected expression before ?do?
make[2]: *** [block/compat_ioctl.o] Error 1
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
All ppc32 systems except PReP and 8xx are capable of handling 3G of user
address space. Old legacy had set this to 2GB and no one has bothered to
fix it.
8xx could be bumped up to 3GB if its SW TLB miss handlers were fixed up
to properly determine kernel/user addresses.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Move to using PAGE_OFFSET instead of TASK_SIZE or KERNELBASE value on
6xx/40x/44x/fsl-booke to determine if the faulting address is a kernel or
user space address. This mimics how the macro is_kernel_addr() works.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Using weight32() to determine if a value is a power of 2 is a rather
heavi weight solution. The classic idiom is (x & (x - 1)) == 0, but
the kernel already provide a is_power_of_2 function for it.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Change the $(ARCH) dependency to $(SRCARCH) to honor the x86
namespace for i386 and x86_64.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
asm-powerpc/mpc85xx.h was really a hold over from arch/ppc. Now that
more decoupling has occurred we can remove <asm/mpc85xx.h> and some of
its legacy.
As part of this we moved the definition of CPM_MAP_ADDR into cpm2.h
for 85xx platforms. This is a stop gap until drivers stop using
CPM_MAP_ADDR.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We don't use any CPM devices on these boards, but the muram node on these
chips is different from the 8560, so it's helpful to people working with
custom boards based on these chips.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In testing the new clocksource and clockevent code on a PPC601
processor, I discovered that the clockevent multiplier value for the
decrementer clockevent was overflowing. Because the RTCL register in
the 601 effectively counts at 1GHz (it doesn't actually, but it
increases by 128 every 128ns), and the shift value was 32, that meant
the multiplier value had to be 2^32, which won't fit in an unsigned
long on 32-bit. The same problem would arise on any platform where
the timebase frequency was 1GHz or more (not that we actually have any
such machines today).
This fixes it by reducing the shift value to 16. Doing the
calculations with a resolution of 2^-16 nanoseconds (15 femtoseconds)
should be quite adequate. :)
Signed-off-by: Paul Mackerras <paulus@samba.org>
On old powermacs, we sometimes set the decrementer to 1 in order to
trigger a decrementer interrupt, which we use to handle an interrupt
that was pending at the time when it was re-enabled. This was causing
the decrementer clock event device to call the event function for the
next event early, which was causing problems when high-res timers were
not enabled.
This fixes the problem by recording the timebase value at which the
next event should occur, and checking the current timebase against the
recorded value in timer_interrupt. If it isn't time for the next
event, it just reprograms the decrementer and returns.
This also subtracts 1 from the value stored into the decrementer,
which is appropriate because the decrementer interrupts on the
transition from 0 to -1, not when the decrementer reaches 0.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Some IBM machines supply a "logical" PVR (processor version register)
value in the device tree in the cpu nodes rather than the real PVR.
This is used for instance to indicate that the processors in a POWER6
partition have been configured by the hypervisor to run in POWER5+
mode rather than POWER6 mode. To cope with this, we call identify_cpu
a second time with the logical PVR value (the first call is with the
real PVR value in the very early setup code).
However, POWER5+ machines can also supply a logical PVR value, and use
the same value (the value that indicates a v2.04 architecture
compliant processor). This causes problems for code that uses the
performance monitor (such as oprofile), because the PMU registers are
different in POWER6 (even in POWER5+ mode) from the real POWER5+.
This change works around this problem by taking out the PMU
information from the cputable entries for the logical PVR values, and
changing identify_cpu so that the second call to it won't overwrite
the PMU information that was established by the first call (the one
with the real PVR), but does update the other fields. Specifically,
if the cputable entry for the logical PVR value has num_pmcs == 0,
none of the PMU-related fields get used.
So that we can create a mixed cputable entry, we now make cur_cpu_spec
point to a single static struct cpu_spec, and copy stuff from
cpu_specs[i] into it. This has the side-effect that we can now make
cpu_specs[] be initdata.
Ultimately it would be good to move the PMU-related fields out to a
separate structure, pointed to by the cputable entries, and change
identify_cpu so that it saves the PMU info pointer, copies the whole
structure, and restores the PMU info pointer, rather than identify_cpu
having to list all the fields that are *not* PMU-related.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
As explained on:
http://www.avrfreaks.net/index.php?nameÿphpBB2&fileÿewtopic&tS307
If the current process is preempted before it can copy RAR_SUP and
RSR_SUP both register are lost and the process will segfault as soon
as it return from the syscall since the return adress will be
corrupted.
This patch disable IRQ as soon as we enter the syscall path and
reenable them when the copy is done.
In the interrupt handlers, check if we are interrupting the srrf
instruction, if so disable interrupts and return. The interrupt
handler will be re-called immediatly when the interrupts are
reenabled.
After some stressing workload:
- find / > /dev/null in loop
- top (in ssh)
- ping -f avr32
The segfaults are not seen anymore.
Signed-off-by: Philippe Rétornaz <philippe.retornaz@epfl.ch>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
The implementation of __builtin_xchg() in at least some versions of
avr32 gcc is buggy. Rather than find out exactly which versions that
have this bug, let's just avoid the problem altogether by implementing
xchg() in inline assembly.
Also, in most architectures, xchg() seems to imply a memory barrier,
while the existing avr32 implementation did not. This patch also fixes
that discrepancy.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Make the NGW100 bitbang i2c use open drain signaling.
Also, speed it up, so it's closer to 100 kHz ... the code paths seem
to be long enough that the udelay isn't dominating bit times. The
peak bit rate I observed was around 125 kHz, but that's with large
delays (usually before ACK/NAK) which hold the overall rate down to
around 80 kHz (call it 100 usec/byte on average).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
