Commit Graph

17618 Commits

Author SHA1 Message Date
Cyrill Gorcunov
26cb7d8bbd [POWERPC] Use for_each macros in arch/powerpc/sysdev
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-17 14:56:54 +11:00
Grant Likely
283029d16a [POWERPC] Add of_find_matching_node() helper function
Similar to of_find_compatible_node(), of_find_matching_node() and
for_each_matching_node() allow you to iterate over the device tree
looking for specific nodes, except that they take of_device_id
tables instead of strings.

This also moves of_match_node() from driver/of/device.c to
driver/of/base.c to colocate it with the of_find_matching_node which
depends on it.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-01-17 14:53:22 +11:00
Josh Boyer
98c31c1d6c Merge branch 'virtex-for-2.6.25' of git://git.secretlab.ca/git/linux-2.6-virtex into for-2.6.25 2008-01-11 07:02:57 -06:00
Stephen Neuendorffer
c35a8fb2f2 [POWERPC] Xilinx: updated device tree compatibility to match uboot bsp generator.
Missed this one in the boot loader before.

Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-01-09 07:56:31 -07:00
Stephen Neuendorffer
faa6511109 [POWERPC] Xilinx: Add correct compatible list for device tree bus bindings.
Includes both flavors of plb, opb, dcr, and a pseudo 'compound' bus
for representing compound peripherals containing more than one logical
device.

Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-01-09 07:56:29 -07:00
Stephen Neuendorffer
021a607c2f [POWERPC] Xilinx: update compatible list for interrupt controller
These values now match what is generated by the uboot BSP generator.

Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2008-01-09 07:48:31 -07:00
Stefan Roese
78994e240f [POWERPC] 4xx: PCIe: Increase max busses per port to 64
Because of how big mapping the config space is (1M per bus), we limit how
many busses we support for now. In the long run, we could replace that
with something akin to kmap_atomic instead.

This patch changes the limit from currently 16 to 64.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-01-08 08:05:23 -06:00
Matthias Fuchs
2af59f7d5c [POWERPC] 4xx: Add 405GPr and 405EP support in boot wrapper
This patch adds support for 405GPr processors with optional
new mode strapping. ibm405gp_fixup_clocks() can now be used
for 405GP and 405GPr CPUs.

This is in preparation of porting the cpci405 platform support
from arch/ppc to arch/powerpc.

This patch also adds ibm405ep_fixup_clocks() to support
405EP CPUs from the boot wrapper.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-01-08 07:58:09 -06:00
Hollis Blanchard
5834584e4e [POWERPC] 4xx: enable built-in networking for Sequoia defconfig
Enable EMAC driver for Sequoia (and while we're in there, disable
Macintosh drivers for Sequoia and Bamboo).

Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-01-08 07:43:57 -06:00
Stefan Roese
7e52b48216 [POWERPC] 4xx: Add EMAC support to Kilauea defconfig
Somehow the EMAC support was dropped (or never really added) to the
Kilauea defconfig file. This patch finally adds EMAC support.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-01-04 12:52:52 -06:00
Grant Likely
1fe1b95d86 [POWERPC] 4xx: typo in calling machine_device_initcall() for Sequoia board
Fix an obvious typo.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-01-02 11:38:15 -06:00
Paul Mackerras
4f43143f9f Merge branch 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/pasemi 2007-12-31 13:54:13 +11:00
Paul Mackerras
533b1928b5 Revert "[POWERPC] Disable PCI IO/Mem on a device when resources can't be allocated"
This reverts commit 553aa7659b at Ben H's
request, because it confused IORESOURCE_* flags with command register
bits.

Requested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-31 10:12:45 +11:00
Olof Johansson
90c26375b4 [POWERPC] Enable CONFIG_PCI_MSI and CONFIG_MD in pasemi_defconfig
Enable MSI now that we have an implementation, and enable CONFIG_MD and
the raid options by default as well.

Signed-off-by: Olof Johansson <olof@lixom.net>
2007-12-28 11:02:34 -06:00
Olof Johansson
d87bf3bed7 [POWERPC] pasemi: Distribute interrupts evenly across cpus
By default the OpenPIC on PWRficient will bias to one core (since that
will improve changes of the other core being able to stay idle/powered
down). However, this conflicts with most irq load balancing schemes,
since setting an interrupt to be delivered to either core doesn't really
result in the load being shared. It also doesn't work well with the
soft irq disable feature of PPC, since EE will stay on until the first
interrupt is taken while soft disabled.

Set the gconf0 config bit that enables even distribution of interrupts
among the two cores.

Signed-off-by: Olof Johansson <olof@lixom.net>
2007-12-28 09:22:25 -06:00
Olof Johansson
f365355e65 [POWERPC] pasemi: Implement NMI support
Some PWRficient-based boards have a NMI button that's wired up to a GPIO
as interrupt source. By configuring the openpic accordingly, these get
delivered as a machine check with high priority, instead of as an external
interrupt.

The device tree contains a property "nmi-source" in the openpic node
for these systems, and it's the (hwirq) source for the input.

Also, for these interrupts, the IACK is read from another register than
the regular (MCACK instead), but they are EOI'd as usual. So implement
said function for the mpic driver.

Finally, move a couple of external function defines to include/ instead
of local under sysdev. Being able to mask/unmask and eoi directly saves
us from setting up a dummy irq handler that will never be called.

Signed-off-by: Olof Johansson <olof@lixom.net>
2007-12-28 09:22:24 -06:00
Josh Boyer
d2d8cfc657 [POWERPC] 4xx: Update defconfigs
Update the 4xx board defconfigs

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-24 19:46:29 -06:00
Josh Boyer
67196d7275 [POWERPC] 4xx: Minor coding style cleanups for 4xx bootwrapper
Remove some unneeded braces and make a busy loop more obvious.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-24 19:46:06 -06:00
Josh Boyer
3f8c5c3b4d [POWERPC] 4xx: Use machine_device_initcall for bus probe
Some machine_xx_initcall macros were recently added that check for the machine
type before calling the function.  This converts the 4xx platforms to use those
for bus probing.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-24 10:42:02 -06:00
Josh Boyer
9e0fd5f06c [POWERPC] Remove unneeded variable declarations from mpc837x_mds
Remove the declarations for isa_io_base and isa_mem_base as they are declared
in pci-common.c now.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-24 09:01:11 -06:00
Josh Boyer
e3e414bcc2 [POWERPC] Conditionally compile e200 and e500 platforms in cputable
The e200 and e500 platforms are separated in various parts of the kernel with
ifdefs, most notably reg_booke.h and traps.c.  The new machine_check rework
requires them to be similarly separated in cputable.c to avoid compile errors.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-24 08:44:47 -06:00
Josh Boyer
8cb34d291d [POWERPC] 4xx: Mark of_bus structures as __initdata
Mark the of_device_id structures used to probe the various busses on 4xx
as __initdata.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-24 08:40:31 -06:00
Josh Boyer
9901162370 [POWERPC] 4xx: Update Kilauea, Rainier, and Walnut defconfigs
Enable PCI support for these eval boards among other things.  Also selects
PCI for Rainier in the Kconfig file.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:41:54 -06:00
Stefan Roese
9a2b77b0da [POWERPC] 4xx: Makalu defconfig
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:37:09 -06:00
Stefan Roese
1b55883af0 [POWERPC] 4xx: Makalu dts
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:37:02 -06:00
Stefan Roese
be1e0e98cc [POWERPC] 4xx: Add AMCC Makalu board support to platforms/40x
This patch adds basic support for the AMCC Makalu board to arch/powerpc.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:36:54 -06:00
Stefan Roese
dc88416b09 [POWERPC] 4xx: Change Kilauea PCIe bus ranges in dts file
Currently we have some limitations in the 4xx PCIe driver and can't
support all possible PCIe busses. But the current limits in the
dts file are quite low (only 16 busses per RC). This patch increases
the number to 64 per RC.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:36:33 -06:00
Stefan Roese
8aaed98c1e [POWERPC] 4xx: Add aliases node to 4xx dts files
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:36:30 -06:00
Valentine Barshak
0b2e97518d [POWERPC] 4xx: Add PCI entry to 440GRx Rainier DTS.
This adds PCI entry to PowerPC 440GRx Rainier DTS.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:36:07 -06:00
Valentine Barshak
14b3d926a2 [POWERPC] 4xx: update 440EP(x)/440GR(x) identical PVR issue workaround
Renaming the CPU nodes with generic names put the CPU model in
the "model" property and thus broke the PowerPC 440EP(x)/440GR(x)
identical PVR workaround. The updates it to use the new model property
for CPU identification.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:35:58 -06:00
Josh Boyer
72fda1148e [POWERPC] 4xx: Rename CPU nodes to avoid dtc incompatibility
Recent DTC versions disallow certain special characters in full paths without
being quoted with {}.  That however breaks compatibility with older DTC
versions.  Work around this by renaming the CPU nodes for the 4xx files to a
generic node name, and specify the processor type in the model property of the
CPU node.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:33:47 -06:00
Stefan Roese
55aaf6ecf7 [POWERPC] 4xx: Set ibpre for 405EX in 4xx PCIe driver
This patch sets the ibpre flag (Inbound Presence) for the 405EX
in the 4xx PCIe driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:31:37 -06:00
Stefan Roese
151161c6e2 [POWERPC] 4xx: Add Kilauea PCIe support to dts and Kconfig
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:31:32 -06:00
Stefan Roese
0a6ea8bef1 [POWERPC] 4xx: Change Kilauea dts to support new EMAC device tree properties
The recent changes from Benjamin Herrenschmidt to the ibm_newemac now
make it possible to support other 4xx variants by just defining the
correct properties in the device tree. In this case of the 405EX we
need to define "has-mdio" in the RGMII node and "has-inverted-stacr-oc"
and "has-new-stacr-staopc" in the EMAC node same as on the 440EPx.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:31:26 -06:00
Stefan Roese
cdb159af9d [POWERPC] 4xx: Add 405EX CPU type needed for EMAC support on Kilauea
For EMAC support, 405EX needs to be defined to enable the corresponding
EMAC features (IBM_NEW_EMAC_EMAC4, etc.).

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:31:22 -06:00
Stefan Roese
f4151b9ba8 [POWERPC] 4xx: Fix TLB 0 problem with CONFIG_SERIAL_TEXT_DEBUG
Right now TLB entry 0 ist used as UART0 mapping for the early debug
output (via CONFIG_SERIAL_TEXT_DEBUG). This causes problems when many
TLB's get used upon Linux bootup (e.g. while PCIe scanning behind
bridges and/or switches on 440SPe platforms). This will overwrite the
TLB 0 entry and further debug output's may crash/hang the system.

This patch moves the early debug UART0 TLB entry from 0 to 62 as done
in arch/powerpc. This way it is in the "pinned" area and will not get
overwritten. Also the arch/ppc/mm/44x_mmu.c code is now synced with the
newer code from arch/powerpc.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:31:16 -06:00
Josh Boyer
4922566f03 [POWERPC] 4xx: libfdt and pci fixes for Rainier
Update the Rainier wrapper for the libfdt merge and add the pci flags to the
platform file.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:28:40 -06:00
Josh Boyer
af7baf9259 [POWERPC] 4xx: Include missing header
A small error caused a header file to be removed making sequoia support no
longer compile.  Fix it.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:28:24 -06:00
Valentine Barshak
58c5019267 [POWERPC] 44x: Sequoia and Rainier updates for 2.6.25
PowerPC 440Epx/GRx Sequoia/Rainier updates for 2.6.25

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:27:58 -06:00
Josh Boyer
9ac30c3145 [POWERPC] 4xx: Fix 440grx setup function to call 440A fixup
The mechanism to do the setup for 440A cores changed recently.  This fixes
the 440grx setup function to call __fixup_440A_mcheck.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:27:37 -06:00
Valentine Barshak
2a13448aa3 [POWERPC] 4xx: Add PCI entry to 440EPx Sequoia DTS.
This adds PCI entry to PowerPC 440EPx Sequoia DTS.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:26:37 -06:00
Valentine Barshak
b2be3b1529 [POWERPC] 4xx: Correct 440GRx machine_check callback
Correct the PowerPC 440GRx machine check callback.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:26:10 -06:00
Valentine Barshak
5aac48dc1a [POWERPC] 4xx: rework UIC cascade irq handling
This is a UIC cascade handler rework to use set_irq_chained_handler() for
cascade, just like othe ppc platforms do. With current implementation we have
additional redirection for irq handler and we call generic_handle_irq twice
(once for the primary uic and the other time for handling cascade interrupt).
This causes Ingo's realtime support patch to stop working on 4xx.

Not sure of any other possible problems though, but with
set_irq_chained_handler() we can abolish "struct irqaction cascade" from the
chip descriptor and call generic_handle_irq() once, directly for cascade irq.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:24:54 -06:00
Valentine Barshak
c80905637e [POWERPC] 4xx: make UIC use generic level irq handler
This patch makes PowerPC 4xx UIC use generic level irq handler instead
of a custom handle_uic_irq() function. We ack only edge irqs in mask_ack
callback, since acking a level irq on UIC has no effect if the interrupt
is still asserted by the device, even if the interrupt is already masked.
So, to really de-assert the interrupt we need to de-assert the external
source first *and* ack it on UIC then. The handle_level_irq() function
masks and ack's the interrupt with mask_ack callback prior to calling
the actual ISR and unmasks it at the end. So, to use it with UIC interrupts
we need to ack level irqs in the unmask callback instead, after the ISR
has de-asserted the external interrupt source. Even if we ack the interrupt
that we didn't handle (unmask/ack it at the end of the handler, while
next irq is already pending) it will not de-assert the irq, untill we
de-assert its exteral source.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:23:47 -06:00
Valentine Barshak
309ae1a363 [POWERPC] 4xx: 440GRx Rainier default config
PowerPC 440GRx Rainier default config.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:23:26 -06:00
Valentine Barshak
6272175d2a [POWERPC] 4xx: 440GRx Rainier board support.
PowerPC 440GRx Rainier board support.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:23:18 -06:00
Valentine Barshak
3910cd8c11 [POWERPC] 4xx: 440GRx Rainier DTS.
PowerPC 440GRx Rainier DTS.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:22:15 -06:00
Valentine Barshak
295e742734 [POWERPC] 4xx: 440GRx Rainier bootwrapper.
Bootwrapper code for PowerPC 440GRx Rainier board.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:22:05 -06:00
Valentine Barshak
f82f5a2672 [POWERPC] 4xx: 440EPx Sequoia USB OHCI DTS entry
Add the 440EPx Sequoia USB OHCI device tree entry.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:20:36 -06:00
Stefan Roese
accf5ef254 [POWERPC] 4xx: Add 440SPe revA runtime detection to PCIe
This patch adds runtime detection of the 440SPe revision A chips. These
chips are equipped with a slighly different PCIe core and need special/
different initialization. The compatible node is changed to
"plb-pciex-440spe" ("A" and "B" dropped). This is needed for boards that
can be equipped with both PPC revisions like the AMCC Yucca.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:19:03 -06:00