Commit Graph

12 Commits

Author SHA1 Message Date
Olof Johansson
7bf1541225 ARM: tegra: core SoC support enhancements
This branch contains fixes and enhancement for core Tegra Soc support:
 * CPU hotplug support for Tegra114.
 * Some preliminary work on Tegra114 CPU sleep modes.
 * Minor fix for EMC table DT parsing.
 
 This branch is based on v3.10-rc1.
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Merge tag 'tegra-for-3.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc

From Stephen Warren:
ARM: tegra: core SoC support enhancements

This branch contains fixes and enhancement for core Tegra Soc support:
* CPU hotplug support for Tegra114.
* Some preliminary work on Tegra114 CPU sleep modes.
* Minor fix for EMC table DT parsing.

* tag 'tegra-for-3.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  ARM: tegra: don't pass CPU ID to tegra_{set,clear}_cpu_in_lp2
  ARM: tegra: cpuidle: using IS_ENABLED for multi SoCs management in init func
  ARM: tegra: hook tegra_tear_down_cpu function in the PM suspend init function
  ARM: tegra: cpuidle: move the init function behind the suspend init function
  ARM: tegra: remove ifdef in the tegra_resume
  ARM: tegra: add cpu_disable for hotplug
  ARM: tegra114: add CPU hotplug support
  clk: tegra114: implement wait_for_reset and disable_clock for tegra_cpu_car_ops
  ARM: tegra114: add power up sequence for warm boot CPU
  ARM: tegra: make tegra_resume can work for Tegra114
  ARM: tegra: skip SCU and PL310 code when CPU is not Cortex-A9
  ARM: tegra: add an assembly marco to check Tegra SoC ID
  ARM: tegra: emc: correction of ram-code parsing from dt

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-14 18:11:31 -07:00
Wolfram Sang
d7fc0dde96 arch/arm/mach-tegra: don't check resource with devm_ioremap_resource
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
2013-05-18 11:58:05 +02:00
Dmitry Osipenko
b39f38c4d2 ARM: tegra: emc: correction of ram-code parsing from dt
Change tegra_emc_ramcode_devnode() to get ram-code from child node instead of
parent.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-17 17:01:24 -06:00
Russell King
33b9f582c5 Merge branch 'cleanup' into for-linus
Conflicts:
	arch/arm/plat-omap/dmtimer.c
2013-05-02 21:31:29 +01:00
Russell King
23cbd4e84f ARM: cleanup: clk_get_sys() error handling
Fix clk_get_sys() error handling; IS_ERR() should be used rather than
IS_ERR_OR_NULL() to check for errors.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-02-24 10:51:00 +00:00
Thierry Reding
5857bd98db ARM: Convert to devm_ioremap_resource()
Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-01-25 12:21:45 -08:00
Greg Kroah-Hartman
351a102dbf ARM: drivers: remove __dev* attributes.
CONFIG_HOTPLUG is going away as an option.  As a result, the __dev*
markings need to be removed.

This change removes the use of __devinit, __devexit_p, __devinitdata,
and __devexit from these drivers.

Based on patches originally written by Bill Pemberton, but redone by me
in order to handle some of the coding style issues better, by hand.

Cc: Bill Pemberton <wfp5p@virginia.edu>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-01-03 15:57:04 -08:00
Stephen Warren
a25186eb03 ARM: tegra: remove unnecessary includes of <mach/*.h>
This should make it easier to delete or move <mach/*.h>; something that
is useful for single-zImage.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05 11:36:05 -07:00
Stephen Warren
76c2f6e513 ARM: tegra: Fix EMC pdata initialization from registers
Commit d91eeb0 "ARM: tegra: emc: device tree support" modified the EMC
driver to create an EMC table from existing register settings when none
was provided through platform data or device tree. This code wrote the
wrong clock rate into the table; the actual rate in Hz, rather than the
expected half-rate in KHz. This caused the BUG_ON in
tegra2_emc_clk_round_rate() to fire, since that enormous rate could not
be generated.

Fixes:

[    2.425921] kernel BUG at arch/arm/mach-tegra/tegra2_clocks.c:1158!
...
[    2.618766] [<c001c0e8>] (tegra2_emc_clk_round_rate+0x58/0x70) from [<c00198b4>] (clk_round_rate+0x48/0x68)
[    2.628494] [<c00198b4>] (clk_round_rate+0x48/0x68) from [<c0019cc0>] (clk_set_rate_locked+0x40/0x68)
[    2.637707] [<c0019cc0>] (clk_set_rate_locked+0x40/0x68) from [<c0019d10>] (clk_set_rate+0x28/0x40)
[    2.646754] [<c0019d10>] (clk_set_rate+0x28/0x40) from [<c001ffc8>] (tegra_update_cpu_speed+0x54/0x144)
[    2.656144] [<c001ffc8>] (tegra_update_cpu_speed+0x54/0x144) from [<c002016c>] (tegra_target+0xb4/0xe0)
[    2.665538] [<c002016c>] (tegra_target+0xb4/0xe0) from [<c01a96c0>] (__cpufreq_driver_target+0x88/0xa4)
[    2.674931] [<c01a96c0>] (__cpufreq_driver_target+0x88/0xa4) from [<c01ac9d0>] (dbs_check_cpu+0x324/0x340)
[    2.684582] [<c01ac9d0>] (dbs_check_cpu+0x324/0x340) from [<c01aca40>] (do_dbs_timer+0x54/0xf4)
[    2.693277] [<c01aca40>] (do_dbs_timer+0x54/0xf4) from [<c00369a8>] (process_one_work+0x1d4/0x320)
[    2.702225] [<c00369a8>] (process_one_work+0x1d4/0x320) from [<c0036f34>] (worker_thread+0x134/0x230)
[    2.711437] [<c0036f34>] (worker_thread+0x134/0x230) from [<c003add0>] (kthread+0x80/0x8c)
[    2.719700] [<c003add0>] (kthread+0x80/0x8c) from [<c000ebf4>] (kernel_thread_exit+0x0/0x8)

Reported-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
[olof: fixed calculation of printed values]
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06 18:25:01 -08:00
Olof Johansson
941b8db1df ARM: tegra: emc: device tree support
Add device tree support to the emc driver, filling in the platform data
based on the DT bindings.

Changes since v1:

* Unmangled some messed up patch squashes, moving changes to earlier patches
* Flipped an of_property_read_u32 return value test
* Clarified clock settings message on case where no table is provided

Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
2012-02-06 18:24:59 -08:00
Olof Johansson
17711dbf47 ARM: tegra: emc: convert tegra2_emc to a platform driver
This is the first step in making it device-tree aware and get rid of the
in-kernel EMC tables (of which there are none in mainline, thankfully).

Changes since v3:

* moved to devm_request_and_ioremap() in probe()

Changes since v2:

* D'oh -- missed a couple of variables that were added, never used and then
  later removed in a later patch.

Changes since v1:

* Fixed messed up indentation
* Removed code that should be gone (was added here and removed later in series)

Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
2012-02-06 18:24:59 -08:00
Colin Cross
efdf72ad5c ARM: tegra: Add external memory controller driver
The frequency memory bus on Tegra can be adjusted without
disabling accesses to memory by updating the memory
configuration registers from a per-board table, and then
changing the clock frequency.  The clock controller and
memory controller have an interlock that prevents the
new memory registers from taking effect until the
clock frequency change.

Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21 00:16:45 -08:00