Commit Graph

185 Commits

Author SHA1 Message Date
Greg Ungerer
c84b564e82 m68knommu: fix rename of pt_regs offset defines breakage
Commit f159ee7829 ("locking,
m68k/asm-offsets: Rename pt_regs offset defines") breaks the
m68knommu entry code that relies on these define names.
Fix the files to match the new define names.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-30 10:06:07 +10:00
Huang Weiyi
6333513833 m68knommu: remove duplicated #include
Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-30 10:06:06 +10:00
Greg Ungerer
14c16db390 m68knommu: set multi-function pins for ethernet when enabled
The ethernet pins on the 532x ColdFire CPU family are multi-function
pins. We need to enable them as ethernet pins when using the FEC
ethernet driver.

Bug report, and older patch, from timothee@manaud.net.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:56 +10:00
Greg Ungerer
49802967cb m68knommu: remove ColdFire direct interrupt register access
Now that the ColdFire 5272 has full interrupt controller functionality
we can remove all the interrupt masking and acking code from the FEC
ethernet driver.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:54 +10:00
Greg Ungerer
9075216d2c m68knommu: create a speciailized ColdFire 5272 interrupt controller
The ColdFire 5272 CPU has a very different interrupt controller than
any of the other ColdFire parts. It needs its own controller code to
correctly setup and ack interrupts.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:54 +10:00
Greg Ungerer
da3601a5fa m68knommu: add support for second interrupt controller of ColdFire 5249
The ColdFire 5249 CPU has a second (compleletly different) interrupt
controller. It is the only ColdFire CPU that has this type. It controlls
GPIO interrupts amongst a number of interrupts from other internal
peripherals. Add support code for it.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:53 +10:00
Greg Ungerer
3945ca0f84 m68knommu: clean up old ColdFire timer irq setup
The recent changes to the old ColdFire interrupt controller code means
we no longer need to manually unmask the timer interrupt. That is now
done in the interrupt controller code proper.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:53 +10:00
Greg Ungerer
39f0fb6a34 m68knommu: map ColdFire interrupts to correct masking bits
The older simple ColdFire interrupt controller has no one-to-one mapping
of interrupt numbers to bits in the interrupt mask register. Create a
mapping array that each ColdFire CPU type can populate with its available
interrupts and the bits that each use in the interrupt mask register.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:52 +10:00
Greg Ungerer
f6a66276f5 m68knommu: clean up ColdFire 532x CPU timer setup
The newer ColdFire 532x family of CPU's uses the old timer, but has a
newer interrupt controller. It doesn't need the special timer setup
that was required when using the older interrupt controller. Remove the
dead timer irq and level setting code, and define the hard coded vector.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:52 +10:00
Greg Ungerer
04b75b10dc m68knommu: simplify ColdFire "timers" clock initialization
The ColdFire "timers" clock setup can be simplified. There is really no
need for the flexible per-platform setup code. The clock interrupt can be
hard defined per CPU platform (in CPU include files). This makes the
actual timer code simpler.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:51 +10:00
Greg Ungerer
f9311f2643 m68knommu: support code to mask external interrupts on old ColdFire CPU's
The external interrupts used on the old Coldfire parts with the old style
interrupt controller can be properly mask/unmasked in the interrupt
handling code.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:51 +10:00
Greg Ungerer
f2154bef81 m68knommu: merge old ColdFire interrupt controller masking macros
Currently the code that supports setting the old style ColdFire interrupt
controller mask registers is macros in the include files of each of the
CPU types. Merge all these into a set of real masking functions in the
old Coldfire interrupt controller code proper. All the macros are basically
the same (excepting a register size difference on really early parts).

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:50 +10:00
Greg Ungerer
5187995f0a m68knommu: remove duplicate ColdFire mcf_autovector() code
Each of the ColdFire CPU platform code that used the old style interrupt
controller had its own copy of the mcf_autovector() function. They are all
the same, remove them all and create a single function in the common
coldfire/intc.c code.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:50 +10:00
Greg Ungerer
e47cc3d6ac m68knommu: mask off all interrupts in ColdFire intc-simr controller
The ColdFire intc-simr interrupt controller should mask off all
interrupt sources at init time. Doing it here instead of separately
in each platform setup.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:48 +10:00
Greg Ungerer
91b1b94f88 m68knommu: remove timer device interrupt setup for ColdFire 532x
With fully implemented interrupt controller code we don't need to do
the custom interrupt setup for the timer device of the ColdFire 532x.
Remove that code.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:48 +10:00
Greg Ungerer
f1a59d244a m68knommu: remove interrupt masking from ColdFire pit timer
With proper interrupt controller code in place there is no need for
devices like the timers to have custom interrupt masking code.
Remove it (and the defines that go along with it).

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:47 +10:00
Greg Ungerer
a3d9bf1dfd m68knommu: remove unecessary interrupt level setting in ColdFire 520x setup
The new code for the interrupt controller in the ColdFire 520x takes
care of all the interrupt controller setup. No manual config of the
level registers (ICR) is required by the  platform device setup code.
So remove it.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:47 +10:00
Greg Ungerer
0531d7b36b m68knommu: complete interrupt controller code for the 68360 CPU
Define the interrupt controller structures along with the interrupt
controller code for the 68360 CPU. This brings the interrupt setup
and control into one place for this CPU family.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:45 +10:00
Greg Ungerer
1985d2538c m68knommu: complete interrupt controller code for the 68328 CPU's
Define the interrupt controller structures along with the interrupt
controller code for the 68328 CPU family. This brings the interrupt
setup and control into one place for this CPU family.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:45 +10:00
Greg Ungerer
33a21263bf m68knommu: use common interrupt controller code for older ColdFire CPU's
The old ColdFire CPU's (5206, 5307, 5407, 5249 etc) use a simple
interrupt controller. Use common setup code for them. This addition
means that all ColdFire CPU's now have some specific type of interrupt
controller code.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:44 +10:00
Greg Ungerer
6589c1d715 m68knommu: clean up ColdFire 532x interrupt setup
With the common intc-simr interrupt controller code in place the ColdFire
532x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:43 +10:00
Greg Ungerer
277c5e3e26 m68knommu: general interrupt controller for ColdFire 532x parts
The ColdFire 532x family of parts uses 2 of the same INTC interrupt
controlers used in the ColdFire 520x family. So modify the code to
support both parts. The extra code for the second INTC controler in
the case of the 520x is easily optimized away to nothing.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:42 +10:00
Greg Ungerer
1f946533bb m68knommu: clean up ColdFire 523x interrupt setup
With the common intc-2 interrupt controller code in place the ColdFire
523x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:42 +10:00
Greg Ungerer
980f9235eb m68knommu: clean up ColdFire 528x interrupt setup
With the common intc-2 interrupt controller code in place the ColdFire
528x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:41 +10:00
Greg Ungerer
1b718c71b7 m68knommu: clean up ColdFire 527x interrupt setup
With the common intc-2 interrupt controller code in place the ColdFire
527x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:41 +10:00
Greg Ungerer
2fba4f0b03 m68knommu: general interrupt controller for ColdFire many 52xx parts
Create general interrupt controller code for the many ColdFire version 2
cores that use the two region INTC interrupt controller. This includes the
523x family, 5270, 5271, 5274, 5275, and the 528x families.

This code does proper masking and unmasking of interrupts. With this in
place some of the driver hacks in place to support ColdFire interrupts
can finally go away.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:40 +10:00
Greg Ungerer
d0d77c26cb m68knommu: remove per device interrupt mask setting for ColdFire 520x
With general interrupt controller code in place we don't need specific
unmasking code for the internal ColdFire 520x UARTs or ethernet (FEC).

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:40 +10:00
Greg Ungerer
cd3dd4068d m68knommu: use general interrupt controller for ColdFire 520x family
Create general interrupt controller code for the ColdFire 520x family,
that does proper masking and unmasking of interrupts. With this in
place some of the driver hacks in place to support ColdFire interrupts
can finally go away.

Within the ColdFire family there is a variety of different interrupt
controllers in use. Some are used on multiple parts, some on only one.
There is quite some differences in some varients, so much so that
common code for all ColdFire parts would be impossible.

This commit introduces code to support one of the newer interrupt
controllers in the ColdFire 5208 and 5207 parts. It has very simple
mask and unmask operations, so is one of the easiest to support.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-16 09:43:39 +10:00
sfking@fdwdc.com
dca7cf33bb generic GPIO support for the Freescale Coldfire 5407.
Add support for the 5407.

Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-10 12:01:24 +10:00
sfking@fdwdc.com
7846fe800a generic GPIO support for the Freescale Coldfire 532x.
Add support for the 532x.

Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-10 12:01:23 +10:00
sfking@fdwdc.com
f7a20ba064 generic GPIO support for the Freescale Coldfire 5307.
Add support for the 5307.

Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-10 12:01:23 +10:00
sfking@fdwdc.com
6da6e63c96 generic GPIO support for the Freescale Coldfire 528x.
Add support for the 528x.

Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-10 12:01:23 +10:00
sfking@fdwdc.com
316f2c483c generic GPIO support for the Freescale Coldfire 5272.
Add support for the 5272.

Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-10 12:01:23 +10:00
sfking@fdwdc.com
f1554da34f generic GPIO support for the Freescale Coldfire 527x.
Add support for the 5271 & 5275.

Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-10 12:01:23 +10:00
sfking@fdwdc.com
9e8ded166d generic GPIO support for the Freescale Coldfire 5249.
Add support for the 5249.

Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-10 12:01:22 +10:00
sfking@fdwdc.com
a03ce7d9ef generic GPIO support for the Freescale Coldfire 523x.
Add support for the 523x.

Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-10 12:01:22 +10:00
sfking@fdwdc.com
afde8560b4 generic GPIO support for the Freescale Coldfire 520x.
Add support for the 520x.

Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-10 12:01:22 +10:00
sfking@fdwdc.com
24a1836ecd generic GPIO support for the Freescale Coldire 5206e.
Add support for the 5206e.

Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-10 12:01:22 +10:00
sfking@fdwdc.com
bc25b057fa generic GPIO support for the Freescale Coldfire 5206.
Add support for the 5206.

Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-10 12:01:22 +10:00
sfking@fdwdc.com
af39bb8b07 core generic GPIO support for Freescale Coldfire processors.
This adds the basic infrastructure used by all of the different Coldfire CPUs.

Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-09-10 12:01:22 +10:00
Greg Ungerer
fb29ad7949 m68knommu: remove obsolete reset code
All ColdFire and non-MMU 68k code has custom reset routines.
Remove the obsolete and now un-used reset macros.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-06-11 13:09:11 +10:00
Greg Ungerer
05728aec8b m68knommu: move CPU reset code for the 5272 ColdFire into its platform code
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-06-11 13:09:10 +10:00
Greg Ungerer
dd65b1de55 m68knommu: move CPU reset code for the 528x ColdFire into its platform code
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-06-11 13:09:10 +10:00
Greg Ungerer
4c0b008d49 m68knommu: move CPU reset code for the 527x ColdFire into its platform code
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-06-11 13:09:10 +10:00
Greg Ungerer
55b33f316d m68knommu: move CPU reset code for the 523x ColdFire into its platform code
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-06-11 13:09:10 +10:00
Greg Ungerer
25ce4a908a m68knommu: move CPU reset code for the 520x ColdFire into its platform code
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-06-11 13:09:10 +10:00
Greg Ungerer
384feb9131 m68knommu: add CPU reset code for the 532x ColdFire
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-06-11 13:09:10 +10:00
Greg Ungerer
6f5aa7ce38 m68knommu: add CPU reset code for the 5249 ColdFire
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-06-11 13:09:09 +10:00
Greg Ungerer
b61a7260ff m68knommu: add CPU reset code for the 5206e ColdFire
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-06-11 13:09:09 +10:00
Greg Ungerer
851377bca6 m68knommu: add CPU reset code for the 5206 ColdFire
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2009-06-11 13:09:09 +10:00