Commit Graph

18 Commits

Author SHA1 Message Date
Bartlomiej Zolnierkiewicz
1813720723 ide: fix UDMA/MWDMA/SWDMA masks (v3)
* use 0x00 instead of 0x80 to disable ->{ultra,mwdma,swdma}_mask
* add udma_mask field to ide_pci_device_t and use it to initialize
  ->ultra_mask in aec62xx, cmd64x, pdc202xx_{new,old} and piix drivers
* fix UDMA masks to match with chipset specific *_ratemask()
  (alim15x3, hpt366, serverworks and siimage drivers need UDMA mask
   filtering method - done in the next patch)

v2:
* piix: fix cable detection for 82801AA_1 and 82372FB_1
  [ Noticed by Sergei Shtylyov <sshtylyov@ru.mvista.com>. ]
* cmd64x: use hwif->cds->udma_mask
  [ Suggested by Sergei Shtylyov <sshtylyov@ru.mvista.com>. ]
* aec62xx: fix newly introduced bug - check DMA status not command register
  [ Noticed by Sergei Shtylyov <sshtylyov@ru.mvista.com>. ]

v3:
* piix: use hwif->cds->udma_mask
  [ Suggested by Sergei Shtylyov <sshtylyov@ru.mvista.com>. ]

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-05-10 00:01:07 +02:00
Sergei Shtylyov
66602c83dc cmd64x: use interrupt status from MRDMODE register (take 2)
Fold the parts of the ide_dma_end() methods identical to __ide_dma_end() into a
mere call to it.
Start using faster versions of the ide_dma_end() and ide_dma_test_irq() methods
for the PCI0646U and newer chips that have the duplicate interrupt status bits
in the I/O mapped MRDMODE register, determing what methods to use at the driver
load time. Do some cleanup/renaming in the "old" ide_dma_test_irq() method too.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-05-05 22:03:50 +02:00
Sergei Shtylyov
5826b318aa cmd64x: procfs code fixes/cleanups (take 2)
Fix several issues with the driver's procfs output:

- when testing if channel is enabled, the code looks at the "simplex" bits, not
  at the real enable bits -- add #define for the primary channel enable bit;

- UltraDMA modes 0, 1, 3 for slave drive reported incorrectly due to using the
  master drive's clock cycle resolution bit.

While at it, also perform the following cleanups:

- don't print extra newline before the first controller's dump;

- correct the chipset names (from CMDxxx to PCI-xxx)

- don't read from the registers which aren't used for dump;

- better align the table column sizes;

- rework UltraDMA mode dump code;

- remove PIO mode dump code that has never been finished;

- remove the duplicate interrupt status (the MRDMODE register bits mirror those
  those in the CFR and ARTTIM23 registers) and fold the dump into single line;

- correct the style of the ?: operators...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-05-05 22:03:50 +02:00
Sergei Shtylyov
7accbffdb8 cmd64x: add/fix enablebits (take 2)
The IDE core looks at the wrong bit when checking if the secondary channel is
enabled on PCI0646 -- CNTRL register bit 7 is read-ahead disable, bit 3 is the
correct one.
Starting with PCI0646U chip, the primary channel can also be enabled/disabled --
so, add 'enablebits' initializers to each 'ide_pci_device_t' structure, handling
the original PCI0646 via adding the init_setup() method and clearing the 'reg'
field there if necessary...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-05-05 22:03:49 +02:00
Sergei Shtylyov
e51e2528d5 cmd64x: interrupt status fixes (take 2)
The driver's ide_dma_test_irq() method was reading the MRDMODE register even on
PCI0643/6 where it was write-only -- fix this by always reading the "backward-
compatible" interrupt bits, renaming dma_alt_stat to irq_stat as the interrupt
status bits are not coupled to DMA.
In addition, wrong interrupt bit was tested/cleared for the primary channel --
it's bit 2 in all the chip specs and the driver used bit 1... :-/

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-05-05 22:03:49 +02:00
Sergei Shtylyov
60e7a82f1a cmd64x: fix multiword and remove single-word DMA support
Fix the multiword DMA and drop the single-word DMA support (which nobody will
miss, I think).  In order to do it, a number of changes was necessary:

- rename program_drive_counts() to program_cycle_times(), pass to it cycle's
  total/active times instead of the clock counts, and convert them into the
  active/recovery clocks there instead of cmd64x_tune_pio() -- this causes
  quantize_timing() to also move;

- contrarywise, move all the code handling the address setup timing into
  cmd64x_tune_pio(), so that setting MWDMA mode wouldn't change address setup;

- remove from the speedproc() method the  bogus code pretending to set the DMA
  timings by twiddling bits in the BMIDE status register, handle setting MWDMA
  by just calling program_cycle_times(); while at it, improve the style of that
  whole switch statement;

- stop fiddling with the DMA capable bits in the speedproc() method -- they do
  not enable DMA, and are properly dealt with by the dma_host_{on,off} methods;

- don't set hwif->swdma_mask in the init_hwif() method anymore.

In addition to those changes, do the following:

- in cmd64x_tune_pio(), when writing to ARTTIM23 register preserve the interrupt
  status bit, eliminate local_irq_{save|restore}() around this code as there's
  *no* actual race with the interrupt handler, and move cmdprintk() to a more
  fitting place -- after ide_get_best_pio_mode() call;

- make {arttim|drwtim}_regs arrays single-dimensional, indexed with drive->dn;

- rename {setup|recovery}_counts[] into more fitting {setup|recovery}_values[];

- in  the speedproc() method, get rid of the duplicate reads/writes from/to the
  UDIDETCRx registers and of the extra variable used to store the transfer mode
  value after filtering,  use another method of determining master/slave drive,
  and cleanup useless parens;

- beautify cmdprintk() output here and there.

While at it, remove meaningless comment about the driver being used only on
UltraSPARC and long non-relevant RCS tag. :-)

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-05-05 22:03:49 +02:00
Sergei Shtylyov
e277a1aaa9 cmd64x: fix recovery time calculation (take 3)
The driver wrongly takes the address setup time into account when calculating
the PIO recovery time -- this leads to slight overclocking of the PIO modes 0
and 1 (so, the prayers failed to help, as usual :-).  Rework the code to be
calculating recovery clock count as a difference between the total cycle count
and the active count (we don't need to calculate the recovery time itself since
it's not specified for the PIO modes 0 to 2, and for modes 3 and 4 this formula
gives enough recovery time anyway in the chip's supported PCI frequency range).

This patch has been inspired by reading the datasheets and looking at what the
libata driver does; it has been compile-tested only (as usual :-) but anyway,
the new code gives the same or longer recovery times than the old one...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-03-17 21:57:24 +01:00
Sergei Shtylyov
f92d50e6fd cmd64x: fix PIO mode setup (take 3)
The driver's tuneproc() method fails to set the drive's own speed -- fix this
by renaming the function to cmd64x_tune_pio(), making it return the mode set,
and "wrapping" the new tuneproc() method around it; while at it, also get rid
of the non-working prefetch control code (filtering out related argument values
in the "wrapper"), remove redundant PIO5 mode limitation, make cmdprintk() give
more sensible mode info, and remove mention about the obsolete /proc/ interface.
Get rid of the broken config_chipset_for_pio() which always tried to set PIO4,
switch to always auto-tuning PIO instead.
Oh, and add the missing PIO5 support to the speedproc() method while at it. :-)

Warning: compile tested only -- getting to the real hardware isn't that easy...

On Tuesday 06 February 2007 22:11, Mikael Pettersson <mikpe@it.uu.se> wrote:
> 
> Worked fine on my SPARC Ultra5 with a CMD646 IDE controller.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-03-03 17:48:53 +01:00
Bartlomiej Zolnierkiewicz
3608b5d71a ide: add ide_set_dma() helper (v2)
* add ide_set_dma() helper and make ide_hwif_t.ide_dma_check return
  -1 when DMA needs to be disabled (== need to call ->ide_dma_off_quietly)
   0 when DMA needs to be enabled  (== need to call ->ide_dma_on)
   1 when DMA setting shouldn't be changed
* fix IDE code to use ide_set_dma() instead if using ->ide_dma_check directly

v2:
* updated for scc_pata

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-02-17 02:40:26 +01:00
Bartlomiej Zolnierkiewicz
d8f4469d5f ide: disable DMA in ->ide_dma_check for "no IORDY" case (v2)
If DMA is unsupported ->ide_dma_check should disable DMA.

v2:
* updated for scc_pata

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-02-17 02:40:25 +01:00
Bartlomiej Zolnierkiewicz
0ecdca26e5 ide: use PIO/MMIO operations directly where possible (v2)
This results in smaller/faster/simpler code and allows future optimizations.
Also remove no longer needed ide[_mm]_{inl,outl}() and ide_hwif_t.{INL,OUTL}.

v2:
* updated for scc_pata

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-02-17 02:40:25 +01:00
Bartlomiej Zolnierkiewicz
7569e8dc22 ide: add ide_use_fast_pio() helper (v3)
* add ide_use_fast_pio() helper for use by host drivers

* add DMA capability and hwif->autodma checks to ide_use_dma()

  - au1xxx-ide/it8213/it821x drivers didn't check for (id->capability & 1)

    [ for the IT8211/2 in SMART mode this check shouldn't be made but since
      in it821x_fixups() we set DMA bit explicitly:

               if(strstr(id->model, "Integrated Technology Express")) {
                       /* In raid mode the ident block is slightly buggy
                          We need to set the bits so that the IDE layer knows
                          LBA28. LBA48 and DMA ar valid */
                       id->capability |= 3;            /* LBA28, DMA */

       we are better off using generic helper if we can ]

  - ide-cris driver didn't set ->autodma

    [ before the patch hwif->autodma was only checked in the chipset specific
      hwif->ide_dma_check implementations, for ide-cris it is cris_dma_check()
      function so there no behavior change here ]

v2:
* updated patch description (thanks to Alan Cox for the feedback)

v3:
* updated for scc_pata driver

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-02-17 02:40:25 +01:00
Bartlomiej Zolnierkiewicz
056a697b73 ide: unexport ide_set_xfer_rate() (v2)
In cmd64x, siimage and scc_pata drivers:
* don't set drive->init_speed as it should be already
  set by successful execution of ide_set_xfer_rate()
* use hwif->speedproc functions directly

Above changes allows removal of EXPORT_SYMBOL_GPL(ide_set_xfer_rate).

v2:
* updated for scc_pata driver

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-02-17 02:40:24 +01:00
Bartlomiej Zolnierkiewicz
82ab1eeceb ide: add missing __init tags to IDE PCI host drivers
also change __devinit tag for sgiioc4.c:ioc4_ide_init() to __init

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-01-27 13:46:56 +01:00
Jörn Engel
6ab3d5624e Remove obsolete #include <linux/config.h>
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-06-30 19:25:36 +02:00
Alan Cox
f201f5046d [PATCH] ide: housekeeping on IDE drivers
Move auto arrays to static (const).  Clean up using PCI_DEVICE in places,
remove unreachable junk and dead code.

Fix the serverworks cable detect logic (if ordering is wrong).  Backport
from libata.  Plenty of scope for more cleanup left.

Signed-off-by: Alan Cox <alan@redhat.com>
Cc: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-28 14:59:07 -07:00
Linus Torvalds
299cc3c166 Fix up more strange byte writes to the PCI_ROM_ADDRESS config word
It's a dword thing, and the value we write is a dword.  Doing a byte
write to it is nonsensical, and writes only the low byte, which only
contains the enable bit.  So we enable a nonsensical address (usually
zero), which causes the controller no end of problems.

Trivial fix, but nasty to find.

Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-13 07:59:34 -07:00
Linus Torvalds
1da177e4c3 Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!
2005-04-16 15:20:36 -07:00