Commit Graph

75 Commits

Author SHA1 Message Date
Michael Chan
087fe256f0 [TG3]: Fix bug in setting a tg3_flag
Found a bug while reviewing the patches the second time.

The TG3_FLAG_TXD_MBOX_HWBUG flag is set after the register access
methods have been determined. This patch fixes it by moving it up before
the various access methods are assigned.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-08-29 15:50:49 -07:00
Michael Chan
15f5a585c6 [TG3]: Eliminate one register write in tg3_restart_ints()
The register write to register 0x68 to restart interrupts is unnecessary
as the interrupt wasn't masked in that register by the irq handler. This
will save one register write in the fast path.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-08-29 15:50:45 -07:00
Michael Chan
6892914fb7 [TG3]: Add indirect register method for 5703 behind ICH
This patch adds the new workaround for 5703 A1/A2 if it is behind
certain ICH bridges. The workaround disables memory and uses config.
cycles only to access all registers. The 5702/03 chips can mistakenly
decode the special cycles from the ICH chipsets as memory write cycles,
causing corruption of register and memory space. Only certain ICH
bridges will drive special cycles with non-zero data during the address
phase which can fall within the 5703's address range. This is not an ICH
bug as the PCI spec allows non-zero address during special cycles.
However, only these ICH bridges are known to drive non-zero addresses
during special cycles.

The indirect_lock is also changed to spin_lock_irqsave from spin_lock_bh
because it is used in irq handler when using the indirect method to
disable interrupts.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-08-29 15:50:42 -07:00
Michael Chan
09ee929ccc [TG3]: Add mailbox read method
This patch adds the mailbox read method and also adds an inline function
tw32_mailbox_f() for mailbox writes that require read flush.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-08-29 15:50:38 -07:00
Michael Chan
1ee582d8e4 [TG3]: Add various register methods
This patch adds various dedicated register read/write methods for the
existing workarounds, including PCIX target workaround, write with read
flush, etc. The chips that require these workarounds will use these
dedicated access functions.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-08-29 15:50:15 -07:00
Michael Chan
2009493065 [TG3]: Add basic register access function pointers
This patch adds the basic function pointers to do register accesses in
the fast path. This was suggested by David Miller. The idea is that
various register access methods for different hardware errata can easily
be implemented with these function pointers and performance will not be
degraded on chips that use normal register access methods.

The various register read write macros (e.g. tw32, tr32, tw32_mailbox)
are redefined to call the function pointers.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-08-29 15:50:12 -07:00
Michael Chan
d4ef160889 [TG3]: Fix ethtool loopback test lockup
The tg3_abort_hw() call in tg3_test_loopback() is causing lockups on
some devices. tg3_abort_hw() disables the memory arbiter, causing
tg3_reset_hw() to hang when it tries to write the pre-reset signature.
tg3_abort_hw() should only be called after the pre-reset signature has
been written. This is all done in tg3_reset_hw() so the tg3_abort_hw()
call is unnecessary and can be removed.

[ Also bump driver version and release date. -DaveM ]

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-08-25 15:31:41 -07:00
David S. Miller
034ea6388a [TG3]: Update driver version and reldate.
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-08-19 12:57:31 -07:00
Michael Chan
da6b2d01d6 [TG3]: Fix SerDes detection
A problem was reported by Grant Grundler on an HP rx8620 using IOX
Core LAN partno(A7109-6) 5701 copper NIC. The tg3 driver mistakenly
detects this NIC as having a SerDes PHY and link does not come up as a
result.

The problem was caused by an incorrectly programmed eeprom that set the
NIC_SRAM_DATA_CFG_PHY_TYPE_FIBER bit in the NIC_SRAM_DATA_CFG location.

This patch will override the NIC_SRAM_DATA_CFG_PHY_TYPE_FIBER bit if a
valid PHY ID is read from the MII registers on older 570x chips where
the MII interface is not used on SerDes chips. On newer chips such as
the 5780 that use MII for both copper and SerDes, SerDes detection must
rely on the eeprom.

This patch will make the SerDes detection identical to versions 3.25 and
older.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Acked-by: Grant Grundler <iod00d@hp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-08-19 12:54:29 -07:00
David S. Miller
7d3f4c9772 [TG3]: Save initial PCI state before registering the netdevice.
Else on SMP systems it is possible for hotplug to execute,
invoke tg3_open(), and end up loading the uninitialized
PCI register save area into the card.

Signed-off-by: David S. Miller <davem@davemloft.net>
2005-08-06 06:35:48 -07:00
David S. Miller
fc87670b6c [TG3]: Update driver version and reldate.
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-07-25 12:45:32 -07:00
Michael Chan
747e8f8bff [TG3]: add 5780 fiber support
Add 5780S support by adding a new tg3_setup_fiber_mii_phy() function and
a timer function for parallel link detection. 5780S uses standard MII
registers for 1000BaseX and runs in GMII mode as opposed to TBI mode on
older serdes chips.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-07-25 12:33:22 -07:00
Michael Chan
ef7f5ec0de [TG3]: disallow jumbo TSO on 5780
Disallow jumbo TSO on 5780 due to hardware restrictions.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-07-25 12:32:25 -07:00
Michael Chan
fdfec1726b [TG3]: consolidate all DMA water mark settings
Consolidate all DMA watermark settings for standard and jumbo frames on
all chips in tg3_init_bufmgr_config() and add new settings for 5780.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-07-25 12:31:48 -07:00
Michael Chan
7e72aad48c [TG3]: add variable buffer size for standard ring
Add a new rx_pkt_buf_sz to the tg3 structure to support variable buffer
sizes on the standard ring.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-07-25 12:31:17 -07:00
Michael Chan
0f893dc6ec [TG3]: add 5780 basic jumbo frame support
Add basic jumbo frames support for 5780. This chip supports jumbo frames
on the standard receive ring without the jumbo ring. The
TG3_FLAG_JUMBO_ENABLE is changed to TG3_FLAG_JUMBO_RING_ENABLE to
indicate using the jumbo ring on 5704 and older chips. A new
TG3_FLG2_JUMBO_CAPABLE flag is added to indicate jumbo frames support
with or without the jumbo ring.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-07-25 12:30:38 -07:00
Michael Chan
4cf78e4fb6 [TG3]: add 5780 basic support
Add 5780 PCI IDs, chip IDs, and other basic support.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-07-25 12:29:19 -07:00
David S. Miller
93e266f600 [TG3]: Update driver version and reldate.
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-07-05 14:43:19 -07:00
Michael Chan
d244c892c8 [TG3]: support for ethtool -C
Add support for ethtool -C with verification of user parameters.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-07-05 14:42:33 -07:00
David S. Miller
5f70eaa0d5 [TG3]: Update driver version and reldate.
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-06-24 20:21:01 -07:00
Michael Chan
bbe832c092 [TG3]: Refinements to new locking strategy.
1. Move tp->irq_sync = 0 to before the interrupt mailbox IO in
   tg3_enable_ints() so that the interrupt handler will always see
   irq_sync == 0 when interrupts are enabled.

2. Remove the tg3_enable_ints() call in tg3_reset_hw(). Interrupts are
   always enabled explicitly or through tg3_netif_start(). This is to
   prevent interrupts being enabled while poll is disabled.

3. Update trans_start with jiffies in tg3_netif_stop() to prevent false
   NETDEV WATCHDOG.

4. Pass in the proper irq_sync parameter to tg3_full_lock() depending on
   netif_running() in some of the ethtool set calls.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-06-24 20:20:04 -07:00
David S. Miller
f47c11eecc [TG3]: Eliminate all hw IRQ handler spinlocks.
Move all driver spinlocks to be taken at sw IRQ
context only.

This fixes the skb_copy() we were doing with hw
IRQs disabled (which is illegal and triggers a
BUG() with HIGHMEM enabled).  It also simplifies
the locking all over the driver tremendously.

We accomplish this feat by creating a special
sequence to synchronize with the hw IRQ handler
using a binary state and synchronize_irq().
This idea is from Herbert Xu.

Thanks to Michael Chan for helping to track down
all of the race conditions in initial versions
of this code.

Signed-off-by: David S. Miller <davem@davemloft.net>
2005-06-24 20:18:35 -07:00
David S. Miller
cd024c8baf [TG3]: Fix missing memory barriers and SD_STATUS_UPDATED bit clearing.
There must be a rmb() between reading the status block tag
and calling tg3_has_work().  This was missing in tg3_mis()
and tg3_interrupt_tagged().  tg3_poll() got it right.

Also, SD_STATUS_UPDATED must be cleared in the status block
right before we call tg3_has_work().  Only tg3_poll() got this
wrong.

Based upon patches and commentary from Grant Grundler and
Michael Chan.

Signed-off-by: David S. Miller <davem@davemloft.net>
2005-06-24 20:17:10 -07:00
David S. Miller
ed7fce6c13 [TG3]: Update driver version and release date.
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-06-08 14:15:52 -07:00
Michael Chan
6d1cfbab4d [TG3]: Fix 5700/5701 DMA corruption on Apple G4.
Fix 5700/5701 DMA write corruption on Apple G4 by detecting the Apple
UniNorth PCI 1.5 chipset and adjusting the DMA write boundary to 16. DMA
test fails to detect the problem with this chipset.

Thanks to Manuel Perez Ayala for reporting the problem and helping to
debug it.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-06-08 14:13:14 -07:00
David S. Miller
15def7bfb6 [TG3]: Update driver version and release date.
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-06-06 15:22:56 -07:00
Michael Chan
9ba2779419 [TG3] Fix link failure in 5701
On some 5701 devices with older bootcode, the LED configuration bits in
SRAM may be invalid with value zero. The fix is to check for invalid
bits (0) and default to PHY 1 mode. Incorrect LED mode will lead to
error in programming the PHY.

Thanks to Grant Grundler for debugging the problem.

>From Grant:
| In May, 2004,  tg3 v3.4 changed how MAC_LED_CTRL (0x40c) was getting
| programmed and how to determine what to program into LED_CTRL. The new
| code trusted NIC_SRAM_DATA_CFG (0x00000b58) to indicate what to write
| to LED_CTRL and MII EXT_CTRL registers. On "IOX Core Lan", SRAM was
| saying MODE_MAC (0x0) and that doesn't work.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-06-06 15:16:20 -07:00
Michael Chan
49cabf49ab [TG3]: Add TSO firmware license
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-06-06 15:15:17 -07:00
Michael Chan
1b62815193 [TG3]: Fix bug in tg3_load_firmware_cpu
Add tg3_nvram_lock() and tg3_nvram_unlock() calls around tg3_halt_cpu().
It is possible that the bootcode may be loading code from nvram during
this call and stopping the cpu without getting the lock may cause
uncompleted nvram data to be left in the nvram data register. Subsequent
calls to read/write nvram data will fail.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-29 14:59:49 -07:00
Michael Chan
d4bc3927d2 [TG3]: Add interrupt test
This test uses the previously added tg3_test_interrupt() to perform the
test.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-29 14:59:20 -07:00
Michael Chan
c76949a682 [TG3]: Add loopback test
The test will loopback one packet in MAC loopback mode and verify the
packet data.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-29 14:58:59 -07:00
Michael Chan
7942e1dbd7 [TG3]: Add memory test
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-29 14:58:36 -07:00
Michael Chan
a71116d1f3 [TG3]: Add register test
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-29 14:58:11 -07:00
Michael Chan
944d980eca [TG3]: Add parameter to tg3_halt
Add a reset kind parameter to tg3_halt() so that the RESET_KIND_SUSPEND
parameter can be passed to tg3_halt() before doing offline tests.

All other calls to tg3_halt() will use the RESET_KIND_SHUTDOWN
parameter.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-29 14:57:48 -07:00
Michael Chan
ca43007a92 [TG3]: Add link test
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-29 14:57:23 -07:00
Michael Chan
566f86adb3 [TG3]: Add nvram test
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-29 14:56:58 -07:00
Michael Chan
4cafd3f533 [TG3]: Add basic selftest infrastructure
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-29 14:56:34 -07:00
David S. Miller
d1faeaeb95 [TG3]: Update driver version.
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-23 14:00:44 -07:00
David S. Miller
ded7340d9d [TG3]: Increase TEST_BUFFER_SIZE to 8K.
This makes the DMA bug workaround test more likely
to find the problem on some systems.

Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-23 13:59:47 -07:00
David S. Miller
413f5431a5 [TG3]: Update driver version and reldate.
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-23 13:13:15 -07:00
Xose Vazquez Perez
d8659255c5 [TG3]: Add 5752M device ID.
Add 0x1601 as 5752M, it's a 5752 but for mobile PCs.
Stolen from Broadcom bcm5700-8.1.55 driver.

Someone forgot to add it to tg3 ;-)

Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-23 12:54:51 -07:00
David S. Miller
f7383c2224 [TG3]: In tg3_poll(), resample status_tag after doing work.
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-18 22:50:53 -07:00
David S. Miller
59e6b43432 [TG3]: Refine DMA boundary setting.
Extract DMA boundary bit selection into a seperate
function, tg3_calc_dma_bndry().  Call this from
tg3_test_dma().

Make DMA test more reliable by using no DMA boundry
setting during the test.  If the test passes, then
use the setting we selected before the test.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Michael Chan <mchan@broadcom.com>
2005-05-18 22:50:10 -07:00
David S. Miller
15f9850d3c [TG3]: Set minimal hw interrupt mitigation.
Even though we do software interrupt mitigation
via NAPI, it still helps to have some minimal
hw assisted mitigation.

This helps, particularly, on systems where register
I/O overhead is much greater than the CPU horsepower.

For example, it helps on NUMA systems.  In such cases
the PIO overhead to disable interrupts for NAPI accounts
for the majority of the packet processing cost.  The
CPU is fast enough such that only a single packet is
processed by each NAPI poll call.

Thanks to Michael Chan for reviewing this patch.

Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-18 22:49:26 -07:00
David S. Miller
fac9b83ea7 [TG3]: Add tagged status support.
When supported, use the TAGGED interrupt processing support
the chip provides.  In this mode, instead of a "on/off" binary
semaphore, an incrementing tag scheme is used to ACK interrupts.

All MSI supporting chips support TAGGED mode, so the tg3_msi()
interrupt handler uses it unconditionally.  This invariant is
verified when MSI support is tested.

Since we can invoke tg3_poll() multiple times per interrupt under
high packet load, we fetch a new copy of the tag value in the
status block right before we actually do the work.

Also, because the tagged status tells the chip exactly which
work we have processed, we can make two optimizations:

1) tg3_restart_ints() need not check tg3_has_work()
2) the tg3_timer() need not poke the chip 10 times per
   second to keep from losing interrupt events

Based upon valuable feedback from Michael Chan <mchan@broadcom.com>

Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-18 22:46:34 -07:00
David S. Miller
b6d31e80f0 [TG3]: Update driver version and reldate.
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-05 14:46:21 -07:00
Michael Chan
e6de8ad1fa [TG3]: Ignore tg3_stop_block() errors.
tg3_stop_block() errors can be safely ignored since tg3_chip_reset()
always follows tg3_stop_block() calls.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-05 14:42:41 -07:00
David S. Miller
b3b7d6be54 [TG3]: Elide tg3_stop_block messages when such events are normal.
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-05-05 14:40:20 -07:00
David S. Miller
f4d0ee983e [TG3]: Set SA_SAMPLE_RANDOM in request_irq() calls.
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-04-28 11:33:20 -07:00
Michael Chan
04237dddd1 [TG3]: Fix tg3_restart_ints()
tg3_restart_ints() is called to re-enable interrupts after tg3_poll()
has finished all the work. It calls tg3_cond_int() to force an interrupt
if the status block updated bit is set. The updated bit will be set if
there is a new status block update sometime during tg3_poll() and it can
be very often. The worst part is that even if all the work has been
processed, the updated bit remains set and an interrupt will be forced
unnecessarily.

The fix is to call tg3_has_work() instead to determine if new work is
posted before forcing an interrupt. The way to force an interrupt is
also changed to use "coalesce_now" instead of "SETINT". The former is
generally a safer way to force the interrupt.

Also deleted the first parameter to tg3_has_work() which is unused.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2005-04-25 15:17:17 -07:00