Commit Graph

4 Commits

Author SHA1 Message Date
Paolo Ciarrocchi
023196a3be x86: coding style fix to arch/x86/boot/pm.c
Before:
   total: 1 errors, 0 warnings, 178 lines checked
After:
   total: 0 errors, 0 warnings, 178 lines checked

No code changed:

arch/x86/boot/pm.o:

   text	   data	    bss	    dec	    hex	filename
    351	      0	      6	    357	    165	pm.o.before
    351	      0	      6	    357	    165	pm.o.after

md5:
   81de3616bceb29691bf835bb62a84ff1  pm.o.before.asm
   81de3616bceb29691bf835bb62a84ff1  pm.o.after.asm

Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17 17:40:49 +02:00
H. Peter Anvin
387faedb1d x86 setup: correct the base in the GDT_ENTRY() macro
The GDT_ENTRY() macro in pm.c would incorrectly cut the bottom 8 bits
off the base.  We didn't define any bases with the bottom 8 bits
nonzero, so it is a non-manifest bug, but it's still a bug.

Pointed out by John Smith <johnsmith9344@gmail.com>.
Cc: John Smith <johnsmith9344@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30 13:33:04 +01:00
H. Peter Anvin
88089519f3 x86 setup: initialize LDTR and TR to make life easier to Intel VT
Intel VT doesn't like to engage when the protected-mode state isn't
fully initialized.  Make life easier for it by initializing LDTR (to
null) and TR (to a dummy hunk of low memory which will never actually
be touched.)

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-01-30 13:33:02 +01:00
Thomas Gleixner
96ae6ea0be i386: move boot
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2007-10-11 11:16:45 +02:00