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dt-bindings: usb: dwc3: Add Amlogic G12A DWC3 Glue Bindings

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Adds the bindings for the Amlogic G12A USB Glue HW.

The Amlogic G12A SoC Family embeds 2 USB Controllers :
- a DWC3 IP configured as Host for USB2 and USB3
- a DWC2 IP configured as Peripheral USB2 Only

A glue connects these both controllers to 2 USB2 PHYs,
and optionnally to an USB3+PCIE Combo PHY shared with the PCIE controller.

The Glue configures the UTMI 8bit interfaces for the USB2 PHYs, including
routing of the OTG PHY between the DWC3 and DWC2 controllers, and
setups the on-chip OTG mode selection for this PHY.

The PHYs phandles are passed  to the Glue node since the Glue controls the
interface with the PHY, not the DWC3 controller.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This commit is contained in:
Neil Armstrong 2019-04-23 10:51:25 +02:00 committed by Felipe Balbi
parent 7a76b97325
commit e8c77fa091
1 changed files with 88 additions and 0 deletions
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88
Documentation/devicetree/bindings/usb/amlogic,dwc3.txt
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@ -40,3 +40,91 @@ Example device nodes:
phy-names = "usb2-phy", "usb3-phy";
};
};
Amlogic Meson G12A DWC3 USB SoC Controller Glue
The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3
in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
only.
A glue connects the DWC3 core to USB2 PHYs and optionnaly to an USB3 PHY.
One of the USB2 PHY can be re-routed in peripheral mode to a DWC2 USB IP.
The DWC3 Glue controls the PHY routing and power, an interrupt line is
connected to the Glue to serve as OTG ID change detection.
Required properties:
- compatible: Should be "amlogic,meson-g12a-usb-ctrl"
- clocks: a handle for the "USB" clock
- resets: a handle for the shared "USB" reset line
- reg: The base address and length of the registers
- interrupts: the interrupt specifier for the OTG detection
- phys: handle to used PHYs on the system
- a <0> phandle can be used if a PHY is not used
- phy-names: names of the used PHYs on the system :
- "usb2-phy0" for USB2 PHY0 if USBHOST_A port is used
- "usb2-phy1" for USB2 PHY1 if USBOTG_B port is used
- "usb3-phy0" for USB3 PHY if USB3_0 is used
- dr_mode: should be "host", "peripheral", or "otg" depending on
the usage and configuration of the OTG Capable port.
- "host" and "peripheral" means a fixed Host or Device only connection
- "otg" means the port can be used as both Host or Device and
be switched automatically using the OTG ID pin.
Optional properties:
- vbus-supply: should be a phandle to the regulator controlling the VBUS
power supply when used in OTG switchable mode
Required child nodes:
A child node must exist to represent the core DWC3 IP block. The name of
the node is not important. The content of the node is defined in dwc3.txt.
A child node must exist to represent the core DWC2 IP block. The name of
the node is not important. The content of the node is defined in dwc2.txt.
PHY documentation is provided in the following places:
- Documentation/devicetree/bindings/phy/meson-g12a-usb2-phy.txt
- Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
Example device nodes:
usb: usb@ffe09000 {
compatible = "amlogic,meson-g12a-usb-ctrl";
reg = <0x0 0xffe09000 0x0 0xa0>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
clocks = <&clkc CLKID_USB>;
resets = <&reset RESET_USB>;
dr_mode = "otg";
phys = <&usb2_phy0>, <&usb2_phy1>,
<&usb3_pcie_phy PHY_TYPE_USB3>;
phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
dwc2: usb@ff400000 {
compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
reg = <0x0 0xff400000 0x0 0x40000>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
clock-names = "ddr";
phys = <&usb2_phy1>;
dr_mode = "peripheral";
g-rx-fifo-size = <192>;
g-np-tx-fifo-size = <128>;
g-tx-fifo-size = <128 128 16 16 16>;
};
dwc3: usb@ff500000 {
compatible = "snps,dwc3";
reg = <0x0 0xff500000 0x0 0x100000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
snps,dis_u2_susphy_quirk;
snps,quirk-frame-length-adjustment;
};
};