media: s5p-mfc: Add support for HEVC decoder
Add support for codec definition and corresponding buffer requirements for HEVC decoder. Signed-off-by: Smitha T Murthy <smitha.t@samsung.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Acked-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
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@ -32,6 +32,7 @@
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#define MFC_NUM_PORTS_V10 1
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/* MFCv10 codec defines*/
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#define S5P_FIMV_CODEC_HEVC_DEC 17
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#define S5P_FIMV_CODEC_HEVC_ENC 26
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/* Encoder buffer size for MFC v10.0 */
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@ -101,6 +101,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
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case S5P_MFC_CODEC_VP8_DEC:
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codec_type = S5P_FIMV_CODEC_VP8_DEC_V6;
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break;
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case S5P_MFC_CODEC_HEVC_DEC:
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codec_type = S5P_FIMV_CODEC_HEVC_DEC;
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break;
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case S5P_MFC_CODEC_H264_ENC:
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codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
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break;
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@ -72,6 +72,7 @@
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#define S5P_MFC_CODEC_H263_DEC 5
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#define S5P_MFC_CODEC_VC1RCV_DEC 6
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#define S5P_MFC_CODEC_VP8_DEC 7
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#define S5P_MFC_CODEC_HEVC_DEC 17
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#define S5P_MFC_CODEC_H264_ENC 20
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#define S5P_MFC_CODEC_H264_MVC_ENC 21
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@ -144,6 +144,13 @@ static struct s5p_mfc_fmt formats[] = {
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.num_planes = 1,
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.versions = MFC_V6PLUS_BITS,
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},
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{
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.fourcc = V4L2_PIX_FMT_HEVC,
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.codec_mode = S5P_FIMV_CODEC_HEVC_DEC,
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.type = MFC_FMT_DEC,
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.num_planes = 1,
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.versions = MFC_V10_BIT,
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},
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};
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#define NUM_FORMATS ARRAY_SIZE(formats)
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@ -220,6 +220,12 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
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S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
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ctx->bank1.size = ctx->scratch_buf_size;
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break;
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case S5P_MFC_CODEC_HEVC_DEC:
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mfc_debug(2, "Use min scratch buffer size\n");
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ctx->bank1.size =
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ctx->scratch_buf_size +
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(ctx->mv_count * ctx->mv_size);
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break;
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case S5P_MFC_CODEC_H264_ENC:
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if (IS_MFCV10(dev)) {
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mfc_debug(2, "Use min scratch buffer size\n");
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@ -321,6 +327,7 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx)
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switch (ctx->codec_mode) {
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case S5P_MFC_CODEC_H264_DEC:
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case S5P_MFC_CODEC_H264_MVC_DEC:
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case S5P_MFC_CODEC_HEVC_DEC:
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ctx->ctx.size = buf_size->h264_dec_ctx;
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break;
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case S5P_MFC_CODEC_MPEG4_DEC:
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@ -434,6 +441,10 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
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ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
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ctx->img_height);
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}
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} else if (ctx->codec_mode == S5P_MFC_CODEC_HEVC_DEC) {
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ctx->mv_size = s5p_mfc_dec_hevc_mv_size(ctx->img_width,
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ctx->img_height);
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ctx->mv_size = ALIGN(ctx->mv_size, 32);
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} else {
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ctx->mv_size = 0;
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}
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@ -515,7 +526,8 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
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buf_size1 -= ctx->scratch_buf_size;
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if (ctx->codec_mode == S5P_FIMV_CODEC_H264_DEC ||
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ctx->codec_mode == S5P_FIMV_CODEC_H264_MVC_DEC){
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ctx->codec_mode == S5P_FIMV_CODEC_H264_MVC_DEC ||
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ctx->codec_mode == S5P_FIMV_CODEC_HEVC_DEC) {
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writel(ctx->mv_size, mfc_regs->d_mv_buffer_size);
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writel(ctx->mv_count, mfc_regs->d_num_mv);
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}
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@ -538,7 +550,8 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
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mfc_regs->d_second_plane_dpb + i * 4);
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}
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if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
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ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
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ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC ||
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ctx->codec_mode == S5P_MFC_CODEC_HEVC_DEC) {
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for (i = 0; i < ctx->mv_count; i++) {
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/* To test alignment */
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align_gap = buf_addr1;
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@ -29,6 +29,9 @@
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#define S5P_MFC_LCU_WIDTH(x_size) DIV_ROUND_UP(x_size, 32)
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#define S5P_MFC_LCU_HEIGHT(y_size) DIV_ROUND_UP(y_size, 32)
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#define s5p_mfc_dec_hevc_mv_size(x, y) \
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(DIV_ROUND_UP(x, 64) * DIV_ROUND_UP(y, 64) * 256 + 512)
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/* Definition */
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#define ENC_MULTI_SLICE_MB_MAX ((1 << 30) - 1)
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#define ENC_MULTI_SLICE_BIT_MIN 2800
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