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-----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCAAuFiEEwPw5LcreJtl1+l5K99NY+ylx4KYFAmCIQeEQHGF4Ym9lQGtl
 cm5lbC5kawAKCRD301j7KXHgptU6D/0XSSkUX/SAy7uUHj5MwikMiMZS1ztzRazk
 /pBCrh504tdnQ7Hm4Bq4fcNz9AOqcPafAmvhsdKKfcRAfkpfTsoYJEif07A8wvcL
 /Ajy43dDdCw+XKV0pg06dkYU/YwurtpkRwP+0YcO3UbAqSCyQUv94I1f+xOpExwe
 t/yFbv/fhds7P/FZL7rkVGNPPji+vNDiWsF2rZ7YiOoyiPBdQMElfDRYEuAo7uMN
 lPKIakmNudrNRpNf8SGhSn2Ls1N6glFY+zJMdIj8TKzYm85hsF6CdlDHAdQgx3s4
 5CEmT6biQ6bX+yiMvr3MMzPqfIpOmJzMMGK33hQBrH2k1nvfqg04iFXN48Wf91mk
 0d4Ydq7j4yqjAlOoWqDj4VT2tqm4lv5Q/rToICtUdkuhQyssMvbvoZnUQBdm4LIv
 fLnNZ/DIX2h5FJGguFETWX9y7qUNtU33IGKUuEIf5QTyiaAUjJnUJR1MZudyp0Xz
 rUSk0Nb0kVwN3xNa63xGYok2IPz9SITVmOf9ci5NBPUKBcAZKX4wNiSGQo0Gs9Tb
 vVUhOb0HHB1LtWCZ6pIGoDvJot5bSitF3m9jtNXIbLf4Iqc9AiCO8WtGEn9aY6Xr
 I17IBqUI6to4ur2SUDT1qF4PI+9ZYP2h7z6ExvNX8N3yIL+CPK8cKKHsy2YBNqkP
 +BLgWt0+qA==
 =6EKM
 -----END PGP SIGNATURE-----

Merge tag 'for-5.13/libata-2021-04-27' of git://git.kernel.dk/linux-block

Pull libata updates from Jens Axboe:
 "Mostly cleanups this time, but also a few additions:

   - kernel-doc cleanups and sanitization (Lee)

   - Spelling fix (Bhaskar)

   - Fix ata_qc_from_tag() return value check in dwc_460ex (Dinghao)

   - Fall-through warning fix (Gustavo)

   - IRQ registration fixes (Sergey)

   - Add AHCI support for Tegra186 (Sowjanya)

   - Add xiling phy support for AHCI (Piyush)

   - SXS disable fix for AHCI for Hisilicon Kunpeng920 (Xingui)

   - pata legacy probe mask support (Maciej)"

* tag 'for-5.13/libata-2021-04-27' of git://git.kernel.dk/linux-block: (54 commits)
  libata: Fix fall-through warnings for Clang
  pata_ipx4xx_cf: Fix unsigned comparison with less than zero
  ata: ahci_tegra: call tegra_powergate_power_off only when PM domain is not present
  ata: ahci_tegra: Add AHCI support for Tegra186
  dt-binding: ata: tegra: Add dt-binding documentation for Tegra186
  dt-bindings: ata: tegra: Convert binding documentation to YAML
  pata_legacy: Add `probe_mask' parameter like with ide-generic
  pata_platform: Document `pio_mask' module parameter
  pata_legacy: Properly document module parameters
  ata: ahci: ceva: Updated code by using dev_err_probe()
  ata: ahci: Disable SXS for Hisilicon Kunpeng920
  ata: libahci_platform: fix IRQ check
  sata_mv: add IRQ checks
  ata: pata_acpi: Fix some incorrect function param descriptions
  ata: libata-acpi: Fix function name and provide description for 'prev_gtf'
  ata: sata_mv: Fix misnaming of 'mv_bmdma_stop()'
  ata: pata_cs5530: Fix misspelling of 'cs5530_init_one()'s 'pdev' param
  ata: pata_legacy: Repair a couple kernel-doc problems
  ata: ata_generic: Fix misspelling of 'ata_generic_init_one()'
  ata: pata_opti: Fix spelling issue of 'val' in 'opti_write_reg()'
  ...
This commit is contained in:
Linus Torvalds 2021-04-28 14:50:20 -07:00
commit c05a182bf4
47 changed files with 538 additions and 167 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

90
Documentation/admin-guide/kernel-parameters.txt
View File

@ -3600,6 +3600,96 @@
Currently this function knows 686a and 8231 chips.
Format: [spp|ps2|epp|ecp|ecpepp]
pata_legacy.all= [HW,LIBATA]
Format: <int>
Set to non-zero to probe primary and secondary ISA
port ranges on PCI systems where no PCI PATA device
has been found at either range. Disabled by default.
pata_legacy.autospeed= [HW,LIBATA]
Format: <int>
Set to non-zero if a chip is present that snoops speed
changes. Disabled by default.
pata_legacy.ht6560a= [HW,LIBATA]
Format: <int>
Set to 1, 2, or 3 for HT 6560A on the primary channel,
the secondary channel, or both channels respectively.
Disabled by default.
pata_legacy.ht6560b= [HW,LIBATA]
Format: <int>
Set to 1, 2, or 3 for HT 6560B on the primary channel,
the secondary channel, or both channels respectively.
Disabled by default.
pata_legacy.iordy_mask= [HW,LIBATA]
Format: <int>
IORDY enable mask. Set individual bits to allow IORDY
for the respective channel. Bit 0 is for the first
legacy channel handled by this driver, bit 1 is for
the second channel, and so on. The sequence will often
correspond to the primary legacy channel, the secondary
legacy channel, and so on, but the handling of a PCI
bus and the use of other driver options may interfere
with the sequence. By default IORDY is allowed across
all channels.
pata_legacy.opti82c46x= [HW,LIBATA]
Format: <int>
Set to 1, 2, or 3 for Opti 82c611A on the primary
channel, the secondary channel, or both channels
respectively. Disabled by default.
pata_legacy.opti82c611a= [HW,LIBATA]
Format: <int>
Set to 1, 2, or 3 for Opti 82c465MV on the primary
channel, the secondary channel, or both channels
respectively. Disabled by default.
pata_legacy.pio_mask= [HW,LIBATA]
Format: <int>
PIO mode mask for autospeed devices. Set individual
bits to allow the use of the respective PIO modes.
Bit 0 is for mode 0, bit 1 is for mode 1, and so on.
All modes allowed by default.
pata_legacy.probe_all= [HW,LIBATA]
Format: <int>
Set to non-zero to probe tertiary and further ISA
port ranges on PCI systems. Disabled by default.
pata_legacy.probe_mask= [HW,LIBATA]
Format: <int>
Probe mask for legacy ISA PATA ports. Depending on
platform configuration and the use of other driver
options up to 6 legacy ports are supported: 0x1f0,
0x170, 0x1e8, 0x168, 0x1e0, 0x160, however probing
of individual ports can be disabled by setting the
corresponding bits in the mask to 1. Bit 0 is for
the first port in the list above (0x1f0), and so on.
By default all supported ports are probed.
pata_legacy.qdi= [HW,LIBATA]
Format: <int>
Set to non-zero to probe QDI controllers. By default
set to 1 if CONFIG_PATA_QDI_MODULE, 0 otherwise.
pata_legacy.winbond= [HW,LIBATA]
Format: <int>
Set to non-zero to probe Winbond controllers. Use
the standard I/O port (0x130) if 1, otherwise the
value given is the I/O port to use (typically 0x1b0).
By default set to 1 if CONFIG_PATA_WINBOND_VLB_MODULE,
0 otherwise.
pata_platform.pio_mask= [HW,LIBATA]
Format: <int>
Supported PIO mode mask. Set individual bits to allow
the use of the respective PIO modes. Bit 0 is for
mode 0, bit 1 is for mode 1, and so on. Mode 0 only
allowed by default.
pause_on_oops=
Halt all CPUs after the first oops has been printed for
the specified number of seconds. This is to be used if

4
Documentation/devicetree/bindings/ata/ahci-ceva.txt
View File

@ -38,6 +38,8 @@ Required properties:
Optional properties:
- ceva,broken-gen2: limit to gen1 speed instead of gen2.
- phys: phandle for the PHY device
- resets: phandle to the reset controller for the SATA IP
Examples:
ahci@fd0c0000 {
@ -56,4 +58,6 @@ Examples:
ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>;
ceva,broken-gen2;
phys = <&psgtr 1 PHY_TYPE_SATA 1 1>;
resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
};

176
Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml Normal file
View File

@ -0,0 +1,176 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/ata/nvidia,tegra-ahci.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Tegra AHCI SATA Controller
maintainers:
- Thierry Reding <thierry.reding@gmail.com>
- Jonathan Hunter <jonathanh@nvidia.com>
properties:
compatible:
enum:
- nvidia,tegra124-ahci
- nvidia,tegra132-ahci
- nvidia,tegra210-ahci
- nvidia,tegra186-ahci
reg:
minItems: 2
maxItems: 3
items:
- description: AHCI registers
- description: SATA configuration and IPFS registers
- description: SATA AUX registers
interrupts:
maxItems: 1
clock-names:
items:
- const: sata
- const: sata-oob
clocks:
maxItems: 2
reset-names:
minItems: 2
items:
- const: sata
- const: sata-cold
- const: sata-oob
resets:
minItems: 2
maxItems: 3
iommus:
maxItems: 1
interconnect-names:
items:
- const: dma-mem
- const: write
interconnects:
maxItems: 2
power-domains:
items:
- description: SAX power-domain
phy-names:
items:
- const: sata-0
phys:
maxItems: 1
hvdd-supply:
description: SATA HVDD regulator supply.
vddio-supply:
description: SATA VDDIO regulator supply.
avdd-supply:
description: SATA AVDD regulator supply.
target-5v-supply:
description: SATA 5V power regulator supply.
target-12v-supply:
description: SATA 12V power regulator supply.
required:
- compatible
- reg
- interrupts
- clock-names
- clocks
- reset-names
- resets
allOf:
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra124-ahci
- nvidia,tegra132-ahci
then:
properties:
reg:
maxItems: 2
reset-names:
minItems: 3
resets:
minItems: 3
required:
- phys
- phy-names
- hvdd-supply
- vddio-supply
- avdd-supply
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra210-ahci
then:
properties:
reg:
minItems: 3
reset-names:
minItems: 3
resets:
minItems: 3
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra186-ahci
then:
properties:
reg:
minItems: 3
reset-names:
maxItems: 2
resets:
maxItems: 2
required:
- iommus
- interconnect-names
- interconnects
- power-domains
additionalProperties: true
examples:
- |
#include <dt-bindings/clock/tegra210-car.h>
#include <dt-bindings/reset/tegra210-car.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
sata@70020000 {
compatible = "nvidia,tegra210-ahci";
reg = <0x70027000 0x00002000>, /* AHCI */
<0x70020000 0x00007000>, /* SATA */
<0x70001100 0x00010000>; /* SATA AUX */
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_SATA>,
<&tegra_car TEGRA210_CLK_SATA_OOB>;
clock-names = "sata", "sata-oob";
resets = <&tegra_car 124>,
<&tegra_car 129>,
<&tegra_car 123>;
reset-names = "sata", "sata-cold", "sata-oob";
};

44
Documentation/devicetree/bindings/ata/nvidia,tegra124-ahci.txt
View File

@ -1,44 +0,0 @@
Tegra SoC SATA AHCI controller
Required properties :
- compatible : Must be one of:
- Tegra124 : "nvidia,tegra124-ahci"
- Tegra132 : "nvidia,tegra132-ahci", "nvidia,tegra124-ahci"
- Tegra210 : "nvidia,tegra210-ahci"
- reg : Should contain 2 entries:
- AHCI register set (SATA BAR5)
- SATA register set
- interrupts : Defines the interrupt used by SATA
- clocks : Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
- clock-names : Must include the following entries:
- sata
- sata-oob
- resets : Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names : Must include the following entries:
- sata
- sata-oob
- sata-cold
- phys : Must contain an entry for each entry in phy-names.
See ../phy/phy-bindings.txt for details.
- phy-names : Must include the following entries:
- For Tegra124 and Tegra132:
- sata-phy : XUSB PADCTL SATA PHY
- For Tegra124 and Tegra132:
- hvdd-supply : Defines the SATA HVDD regulator
- vddio-supply : Defines the SATA VDDIO regulator
- avdd-supply : Defines the SATA AVDD regulator
- target-5v-supply : Defines the SATA 5V power regulator
- target-12v-supply : Defines the SATA 12V power regulator
Optional properties:
- reg :
- AUX register set
- clock-names :
- cml1 :
cml1 clock should be defined here if the PHY driver
doesn't manage them. If it does, they should not be.
- phy-names :
- For T210:
- sata-phy

5
drivers/ata/ahci.c
View File

@ -1772,6 +1772,11 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
hpriv->flags |= AHCI_HFLAG_NO_DEVSLP;
#ifdef CONFIG_ARM64
if (pdev->vendor == PCI_VENDOR_ID_HUAWEI &&
pdev->device == 0xa235 &&
pdev->revision < 0x30)
hpriv->flags |= AHCI_HFLAG_NO_SXS;
if (pdev->vendor == 0x177d && pdev->device == 0xa01c)
hpriv->irq_handler = ahci_thunderx_irq_handler;
#endif

1
drivers/ata/ahci.h
View File

@ -242,6 +242,7 @@ enum {
suspend/resume */
AHCI_HFLAG_IGN_NOTSUPP_POWER_ON = (1 << 27), /* ignore -EOPNOTSUPP
from phy_power_on() */
AHCI_HFLAG_NO_SXS = (1 << 28), /* SXS not supported */
/* ap->flags bits */

41
drivers/ata/ahci_ceva.c
View File

@ -12,6 +12,7 @@
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/reset.h>
#include "ahci.h"
/* Vendor Specific Register Offsets */
@ -87,6 +88,7 @@ struct ceva_ahci_priv {
u32 axicc;
bool is_cci_enabled;
int flags;
struct reset_control *rst;
};
static unsigned int ceva_ahci_read_id(struct ata_device *dev,
@ -202,13 +204,46 @@ static int ceva_ahci_probe(struct platform_device *pdev)
cevapriv->ahci_pdev = pdev;
cevapriv->rst = devm_reset_control_get_optional_exclusive(&pdev->dev,
NULL);
if (IS_ERR(cevapriv->rst))
dev_err_probe(&pdev->dev, PTR_ERR(cevapriv->rst),
"failed to get reset\n");
hpriv = ahci_platform_get_resources(pdev, 0);
if (IS_ERR(hpriv))
return PTR_ERR(hpriv);
rc = ahci_platform_enable_resources(hpriv);
if (rc)
return rc;
if (!cevapriv->rst) {
rc = ahci_platform_enable_resources(hpriv);
if (rc)
return rc;
} else {
int i;
rc = ahci_platform_enable_clks(hpriv);
if (rc)
return rc;
/* Assert the controller reset */
reset_control_assert(cevapriv->rst);
for (i = 0; i < hpriv->nports; i++) {
rc = phy_init(hpriv->phys[i]);
if (rc)
return rc;
}
/* De-assert the controller reset */
reset_control_deassert(cevapriv->rst);
for (i = 0; i < hpriv->nports; i++) {
rc = phy_power_on(hpriv->phys[i]);
if (rc) {
phy_exit(hpriv->phys[i]);
return rc;
}
}
}
if (of_property_read_bool(np, "ceva,broken-gen2"))
cevapriv->flags = CEVA_FLAG_BROKEN_GEN2;

66
drivers/ata/ahci_tegra.c
View File

@ -59,8 +59,6 @@
#define T_SATA0_CFG_PHY_1_PAD_PLL_IDDQ_EN BIT(22)
#define T_SATA0_NVOOB 0x114
#define T_SATA0_NVOOB_COMMA_CNT_MASK (0xff << 16)
#define T_SATA0_NVOOB_COMMA_CNT (0x07 << 16)
#define T_SATA0_NVOOB_SQUELCH_FILTER_MODE_MASK (0x3 << 24)
#define T_SATA0_NVOOB_SQUELCH_FILTER_MODE (0x1 << 24)
#define T_SATA0_NVOOB_SQUELCH_FILTER_LENGTH_MASK (0x3 << 26)
@ -154,11 +152,18 @@ struct tegra_ahci_ops {
int (*init)(struct ahci_host_priv *hpriv);
};
struct tegra_ahci_regs {
unsigned int nvoob_comma_cnt_mask;
unsigned int nvoob_comma_cnt_val;
};
struct tegra_ahci_soc {
const char *const *supply_names;
u32 num_supplies;
bool supports_devslp;
bool has_sata_oob_rst;
const struct tegra_ahci_ops *ops;
const struct tegra_ahci_regs *regs;
};
struct tegra_ahci_priv {
@ -240,11 +245,13 @@ static int tegra_ahci_power_on(struct ahci_host_priv *hpriv)
if (ret)
return ret;
ret = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_SATA,
tegra->sata_clk,
tegra->sata_rst);
if (ret)
goto disable_regulators;
if (!tegra->pdev->dev.pm_domain) {
ret = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_SATA,
tegra->sata_clk,
tegra->sata_rst);
if (ret)
goto disable_regulators;
}
reset_control_assert(tegra->sata_oob_rst);
reset_control_assert(tegra->sata_cold_rst);
@ -261,7 +268,8 @@ static int tegra_ahci_power_on(struct ahci_host_priv *hpriv)
disable_power:
clk_disable_unprepare(tegra->sata_clk);
tegra_powergate_power_off(TEGRA_POWERGATE_SATA);
if (!tegra->pdev->dev.pm_domain)
tegra_powergate_power_off(TEGRA_POWERGATE_SATA);
disable_regulators:
regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies);
@ -280,7 +288,8 @@ static void tegra_ahci_power_off(struct ahci_host_priv *hpriv)
reset_control_assert(tegra->sata_cold_rst);
clk_disable_unprepare(tegra->sata_clk);
tegra_powergate_power_off(TEGRA_POWERGATE_SATA);
if (!tegra->pdev->dev.pm_domain)
tegra_powergate_power_off(TEGRA_POWERGATE_SATA);
regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies);
}
@ -330,10 +339,10 @@ static int tegra_ahci_controller_init(struct ahci_host_priv *hpriv)
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0);
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB);
val &= ~(T_SATA0_NVOOB_COMMA_CNT_MASK |
val &= ~(tegra->soc->regs->nvoob_comma_cnt_mask |
T_SATA0_NVOOB_SQUELCH_FILTER_LENGTH_MASK |
T_SATA0_NVOOB_SQUELCH_FILTER_MODE_MASK);
val |= (T_SATA0_NVOOB_COMMA_CNT |
val |= (tegra->soc->regs->nvoob_comma_cnt_val |
T_SATA0_NVOOB_SQUELCH_FILTER_LENGTH |
T_SATA0_NVOOB_SQUELCH_FILTER_MODE);
writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB);
@ -449,15 +458,35 @@ static const struct tegra_ahci_ops tegra124_ahci_ops = {
.init = tegra124_ahci_init,
};
static const struct tegra_ahci_regs tegra124_ahci_regs = {
.nvoob_comma_cnt_mask = GENMASK(30, 28),
.nvoob_comma_cnt_val = (7 << 28),
};
static const struct tegra_ahci_soc tegra124_ahci_soc = {
.supply_names = tegra124_supply_names,
.num_supplies = ARRAY_SIZE(tegra124_supply_names),
.supports_devslp = false,
.has_sata_oob_rst = true,
.ops = &tegra124_ahci_ops,
.regs = &tegra124_ahci_regs,
};
static const struct tegra_ahci_soc tegra210_ahci_soc = {
.supports_devslp = false,
.has_sata_oob_rst = true,
.regs = &tegra124_ahci_regs,
};
static const struct tegra_ahci_regs tegra186_ahci_regs = {
.nvoob_comma_cnt_mask = GENMASK(23, 16),
.nvoob_comma_cnt_val = (7 << 16),
};
static const struct tegra_ahci_soc tegra186_ahci_soc = {
.supports_devslp = false,
.has_sata_oob_rst = false,
.regs = &tegra186_ahci_regs,
};
static const struct of_device_id tegra_ahci_of_match[] = {
@ -469,6 +498,10 @@ static const struct of_device_id tegra_ahci_of_match[] = {
.compatible = "nvidia,tegra210-ahci",
.data = &tegra210_ahci_soc
},
{
.compatible = "nvidia,tegra186-ahci",
.data = &tegra186_ahci_soc
},
{}
};
MODULE_DEVICE_TABLE(of, tegra_ahci_of_match);
@ -518,10 +551,13 @@ static int tegra_ahci_probe(struct platform_device *pdev)
return PTR_ERR(tegra->sata_rst);
}
tegra->sata_oob_rst = devm_reset_control_get(&pdev->dev, "sata-oob");
if (IS_ERR(tegra->sata_oob_rst)) {
dev_err(&pdev->dev, "Failed to get sata-oob reset\n");
return PTR_ERR(tegra->sata_oob_rst);
if (tegra->soc->has_sata_oob_rst) {
tegra->sata_oob_rst = devm_reset_control_get(&pdev->dev,
"sata-oob");
if (IS_ERR(tegra->sata_oob_rst)) {
dev_err(&pdev->dev, "Failed to get sata-oob reset\n");
return PTR_ERR(tegra->sata_oob_rst);
}
}
tegra->sata_cold_rst = devm_reset_control_get(&pdev->dev, "sata-cold");

2
drivers/ata/ahci_xgene.c
View File

@ -537,7 +537,7 @@ softreset_retry:
/**
* xgene_ahci_handle_broken_edge_irq - Handle the broken irq.
* @ata_host: Host that recieved the irq
* @host: Host that recieved the irq
* @irq_masked: HOST_IRQ_STAT value
*
* For hardware with broken edge trigger latch

2
drivers/ata/ata_generic.c
View File

@ -151,7 +151,7 @@ static int is_intel_ider(struct pci_dev *dev)
}
/**
* ata_generic_init - attach generic IDE
* ata_generic_init_one - attach generic IDE
* @dev: PCI device found
* @id: match entry
*

5
drivers/ata/libahci.c
View File

@ -493,6 +493,11 @@ void ahci_save_initial_config(struct device *dev, struct ahci_host_priv *hpriv)
cap |= HOST_CAP_ALPM;
}
if ((cap & HOST_CAP_SXS) && (hpriv->flags & AHCI_HFLAG_NO_SXS)) {
dev_info(dev, "controller does not support SXS, disabling CAP_SXS\n");
cap &= ~HOST_CAP_SXS;
}
if (hpriv->force_port_map && port_map != hpriv->force_port_map) {
dev_info(dev, "forcing port_map 0x%x -> 0x%x\n",
port_map, hpriv->force_port_map);

4
drivers/ata/libahci_platform.c
View File

@ -582,11 +582,13 @@ int ahci_platform_init_host(struct platform_device *pdev,
int i, irq, n_ports, rc;
irq = platform_get_irq(pdev, 0);
if (irq <= 0) {
if (irq < 0) {
if (irq != -EPROBE_DEFER)
dev_err(dev, "no irq\n");
return irq;
}
if (!irq)
return -EINVAL;
hpriv->irq = irq;

3
drivers/ata/libata-acpi.c
View File

@ -476,7 +476,7 @@ static int ata_dev_get_GTF(struct ata_device *dev, struct ata_acpi_gtf **gtf)
}
/**
* ata_acpi_gtm_xfermode - determine xfermode from GTM parameter
* ata_acpi_gtm_xfermask - determine xfermode from GTM parameter
* @dev: target device
* @gtm: GTM parameter to use
*
@ -624,6 +624,7 @@ static int ata_acpi_filter_tf(struct ata_device *dev,
* ata_acpi_run_tf - send taskfile registers to host controller
* @dev: target ATA device
* @gtf: raw ATA taskfile register set (0x1f1 - 0x1f7)
* @prev_gtf: previous command
*
* Outputs ATA taskfile to standard ATA host controller.
* Writes the control, feature, nsect, lbal, lbam, and lbah registers.

1
drivers/ata/libata-eh.c
View File

@ -2613,6 +2613,7 @@ int ata_eh_reset(struct ata_link *link, int classify,
switch (tmp) {
case -EAGAIN:
rc = -EAGAIN;
break;
case 0:
break;
default:

2
drivers/ata/libata-pmp.c
View File

@ -62,7 +62,7 @@ static unsigned int sata_pmp_read(struct ata_link *link, int reg, u32 *r_val)
* sata_pmp_write - write PMP register
* @link: link to write PMP register for
* @reg: register to write
* @r_val: value to write
* @val: value to write
*
* Write PMP register.
*

4
drivers/ata/libata-sata.c
View File

@ -1067,7 +1067,7 @@ int ata_scsi_change_queue_depth(struct scsi_device *sdev, int queue_depth)
EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
/**
* port_alloc - Allocate port for a SAS attached SATA device
* ata_sas_port_alloc - Allocate port for a SAS attached SATA device
* @host: ATA host container for all SAS ports
* @port_info: Information from low-level host driver
* @shost: SCSI host that the scsi device is attached to
@ -1127,7 +1127,7 @@ int ata_sas_port_start(struct ata_port *ap)
EXPORT_SYMBOL_GPL(ata_sas_port_start);
/**
* ata_port_stop - Undo ata_sas_port_start()
* ata_sas_port_stop - Undo ata_sas_port_start()
* @ap: Port to shut down
*
* May be used as the port_stop() entry in ata_port_operations.

6
drivers/ata/libata-transport.c
View File

@ -250,7 +250,7 @@ static int ata_tport_match(struct attribute_container *cont,
/**
* ata_tport_delete -- remove ATA PORT
* @port: ATA PORT to remove
* @ap: ATA PORT to remove
*
* Removes the specified ATA PORT. Remove the associated link as well.
*/
@ -376,7 +376,7 @@ static int ata_tlink_match(struct attribute_container *cont,
/**
* ata_tlink_delete -- remove ATA LINK
* @port: ATA LINK to remove
* @link: ATA LINK to remove
*
* Removes the specified ATA LINK. remove associated ATA device(s) as well.
*/
@ -632,7 +632,7 @@ static void ata_tdev_free(struct ata_device *dev)
/**
* ata_tdev_delete -- remove ATA device
* @port: ATA PORT to remove
* @ata_dev: ATA device to remove
*
* Removes the specified ATA device.
*/

6
drivers/ata/pata_acpi.c
View File

@ -28,7 +28,7 @@ struct pata_acpi {
/**
* pacpi_pre_reset - check for 40/80 pin
* @ap: Port
* @link: ATA link
* @deadline: deadline jiffies for the operation
*
* Perform the PATA port setup we need.
@ -63,8 +63,8 @@ static int pacpi_cable_detect(struct ata_port *ap)
/**
* pacpi_discover_modes - filter non ACPI modes
* @ap: ATA port
* @adev: ATA device
* @mask: proposed modes
*
* Try the modes available and see which ones the ACPI method will
* set up sensibly. From this we get a mask of ACPI modes we can use
@ -224,7 +224,7 @@ static struct ata_port_operations pacpi_ops = {
/**
* pacpi_init_one - Register ACPI ATA PCI device with kernel services
* @pdev: PCI device to register
* @ent: Entry in pacpi_pci_tbl matching with @pdev
* @id: PCI device ID
*
* Called from kernel PCI layer.
*

6
drivers/ata/pata_ali.c
View File

@ -108,8 +108,8 @@ static int ali_c2_cable_detect(struct ata_port *ap)
/**
* ali_20_filter - filter for earlier ALI DMA
* @ap: ALi ATA port
* @adev: attached device
* @adev: ATA device
* @mask: received mask to manipulate and pass back
*
* Ensure that we do not do DMA on CD devices. We may be able to
* fix that later on. Also ensure we do not do UDMA on WDC drives
@ -313,7 +313,7 @@ static void ali_lock_sectors(struct ata_device *adev)
/**
* ali_check_atapi_dma - DMA check for most ALi controllers
* @adev: Device
* @qc: Command to complete
*
* Called to decide whether commands should be sent by DMA or PIO
*/

6
drivers/ata/pata_amd.c
View File

@ -167,7 +167,6 @@ static int amd_cable_detect(struct ata_port *ap)
/**
* amd_fifo_setup - set the PIO FIFO for ATA/ATAPI
* @ap: ATA interface
* @adev: ATA device
*
* Set the PCI fifo for this device according to the devices present
* on the bus at this point in time. We need to turn the post write buffer
@ -320,8 +319,9 @@ static unsigned long nv_mode_filter(struct ata_device *dev,
}
/**
* nv_probe_init - cable detection
* @lin: ATA link
* nv_pre_reset - cable detection
* @link: ATA link
* @deadline: deadline jiffies for the operation
*
* Perform cable detection. The BIOS stores this in PCI config
* space for us.

15
drivers/ata/pata_arasan_cf.c
View File

@ -818,12 +818,19 @@ static int arasan_cf_probe(struct platform_device *pdev)
else
quirk = CF_BROKEN_UDMA; /* as it is on spear1340 */
/* if irq is 0, support only PIO */
acdev->irq = platform_get_irq(pdev, 0);
if (acdev->irq)
/*
* If there's an error getting IRQ (or we do get IRQ0),
* support only PIO
*/
ret = platform_get_irq(pdev, 0);
if (ret > 0) {
acdev->irq = ret;
irq_handler = arasan_cf_interrupt;
else
} else if (ret == -EPROBE_DEFER) {
return ret;
} else {
quirk |= CF_BROKEN_MWDMA | CF_BROKEN_UDMA;
}
acdev->pbase = res->start;
acdev->vbase = devm_ioremap(&pdev->dev, res->start,

4
drivers/ata/pata_artop.c
View File

@ -268,7 +268,7 @@ static void artop6260_set_dmamode (struct ata_port *ap, struct ata_device *adev)
}
/**
* artop_6210_qc_defer - implement serialization
* artop6210_qc_defer - implement serialization
* @qc: command
*
* Issue commands per host on this chip.
@ -344,7 +344,7 @@ static void atp8xx_fixup(struct pci_dev *pdev)
/**
* artop_init_one - Register ARTOP ATA PCI device with kernel services
* @pdev: PCI device to register
* @ent: Entry in artop_pci_tbl matching with @pdev
* @id: PCI device ID
*
* Called from kernel PCI layer.
*

3
drivers/ata/pata_atiixp.c
View File

@ -93,6 +93,7 @@ static int atiixp_prereset(struct ata_link *link, unsigned long deadline)
* atiixp_set_pio_timing - set initial PIO mode data
* @ap: ATA interface
* @adev: ATA device
* @pio: Requested PIO
*
* Called by both the pio and dma setup functions to set the controller
* timings for PIO transfers. We must load both the mode number and
@ -227,7 +228,7 @@ static void atiixp_bmdma_start(struct ata_queued_cmd *qc)
}
/**
* atiixp_dma_stop - DMA stop callback
* atiixp_bmdma_stop - DMA stop callback
* @qc: Command in progress
*
* DMA has completed. Clear the UDMA flag as the next operations will

2
drivers/ata/pata_cs5520.c
View File

@ -52,6 +52,7 @@ static const struct pio_clocks cs5520_pio_clocks[]={
* cs5520_set_timings - program PIO timings
* @ap: ATA port
* @adev: ATA device
* @pio: PIO ID
*
* Program the PIO mode timings for the controller according to the pio
* clocking table.
@ -246,6 +247,7 @@ static int cs5520_reinit_one(struct pci_dev *pdev)
/**
* cs5520_pci_device_suspend - device suspend
* @pdev: PCI device
* @mesg: PM event message
*
* We have to cut and waste bits from the standard method because
* the 5520 is a bit odd and not just a pure ATA device. As a result

2
drivers/ata/pata_cs5530.c
View File

@ -271,7 +271,7 @@ fail_put:
/**
* cs5530_init_one - Initialise a CS5530
* @dev: PCI device
* @pdev: PCI device
* @id: Entry in match table
*
* Install a driver for the newly found CS5530 companion chip. Most of

1
drivers/ata/pata_hpt366.c
View File

@ -192,6 +192,7 @@ static int hpt_dma_blacklisted(const struct ata_device *dev, char *modestr,
/**
* hpt366_filter - mode selection filter
* @adev: ATA device
* @mask: Current mask to manipulate and pass back
*
* Block UDMA on devices that cause trouble with this controller.
*/

6
drivers/ata/pata_hpt37x.c
View File

@ -275,6 +275,7 @@ static const char * const bad_ata100_5[] = {
/**
* hpt370_filter - mode selection filter
* @adev: ATA device
* @mask: mode mask
*
* Block UDMA on devices that cause trouble with this controller.
*/
@ -293,6 +294,7 @@ static unsigned long hpt370_filter(struct ata_device *adev, unsigned long mask)
/**
* hpt370a_filter - mode selection filter
* @adev: ATA device
* @mask: mode mask
*
* Block UDMA on devices that cause trouble with this controller.
*/
@ -463,7 +465,7 @@ static void hpt370_set_dmamode(struct ata_port *ap, struct ata_device *adev)
}
/**
* hpt370_bmdma_end - DMA engine stop
* hpt370_bmdma_stop - DMA engine stop
* @qc: ATA command
*
* Work around the HPT370 DMA engine.
@ -557,7 +559,7 @@ static void hpt372_set_dmamode(struct ata_port *ap, struct ata_device *adev)
}
/**
* hpt37x_bmdma_end - DMA engine stop
* hpt37x_bmdma_stop - DMA engine stop
* @qc: ATA command
*
* Clean up after the HPT372 and later DMA engine

2
drivers/ata/pata_hpt3x2n.c
View File

@ -237,7 +237,7 @@ static void hpt3x2n_set_dmamode(struct ata_port *ap, struct ata_device *adev)
}
/**
* hpt3x2n_bmdma_end - DMA engine stop
* hpt3x2n_bmdma_stop - DMA engine stop
* @qc: ATA command
*
* Clean up after the HPT3x2n and later DMA engine

4
drivers/ata/pata_it821x.c
View File

@ -334,7 +334,7 @@ static void it821x_passthru_set_dmamode(struct ata_port *ap, struct ata_device *
}
/**
* it821x_passthru_dma_start - DMA start callback
* it821x_passthru_bmdma_start - DMA start callback
* @qc: Command in progress
*
* Usually drivers set the DMA timing at the point the set_dmamode call
@ -357,7 +357,7 @@ static void it821x_passthru_bmdma_start(struct ata_queued_cmd *qc)
}
/**
* it821x_passthru_dma_stop - DMA stop callback
* it821x_passthru_bmdma_stop - DMA stop callback
* @qc: ATA command
*
* We loaded new timings in dma_start, as a result we need to restore

8
drivers/ata/pata_ixp4xx_cf.c
View File

@ -135,12 +135,12 @@ static void ixp4xx_setup_port(struct ata_port *ap,
static int ixp4xx_pata_probe(struct platform_device *pdev)
{
unsigned int irq;
struct resource *cs0, *cs1;
struct ata_host *host;
struct ata_port *ap;
struct ixp4xx_pata_data *data = dev_get_platdata(&pdev->dev);
int ret;
int irq;
cs0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
cs1 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
@ -165,8 +165,12 @@ static int ixp4xx_pata_probe(struct platform_device *pdev)
return -ENOMEM;
irq = platform_get_irq(pdev, 0);
if (irq)
if (irq > 0)
irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
else if (irq < 0)
return irq;
else
return -EINVAL;
/* Setup expansion bus chip selects */
*data->cs0_cfg = data->cs0_bits;

2
drivers/ata/pata_jmicron.c
View File

@ -120,7 +120,7 @@ static struct ata_port_operations jmicron_ops = {
/**
* jmicron_init_one - Register Jmicron ATA PCI device with kernel services
* @pdev: PCI device to register
* @ent: Entry in jmicron_pci_tbl matching with @pdev
* @id: PCI device ID
*
* Called from kernel PCI layer.
*

106
drivers/ata/pata_legacy.c
View File

@ -63,7 +63,66 @@
static int all;
module_param(all, int, 0444);
MODULE_PARM_DESC(all, "Grab all legacy port devices, even if PCI(0=off, 1=on)");
MODULE_PARM_DESC(all,
"Set to probe unclaimed pri/sec ISA port ranges even if PCI");
static int probe_all;
module_param(probe_all, int, 0);
MODULE_PARM_DESC(probe_all,
"Set to probe tertiary+ ISA port ranges even if PCI");
static int probe_mask = ~0;
module_param(probe_mask, int, 0);
MODULE_PARM_DESC(probe_mask, "Probe mask for legacy ISA PATA ports");
static int autospeed;
module_param(autospeed, int, 0);
MODULE_PARM_DESC(autospeed, "Chip present that snoops speed changes");
static int pio_mask = ATA_PIO4;
module_param(pio_mask, int, 0);
MODULE_PARM_DESC(pio_mask, "PIO range for autospeed devices");
static int iordy_mask = 0xFFFFFFFF;
module_param(iordy_mask, int, 0);
MODULE_PARM_DESC(iordy_mask, "Use IORDY if available");
static int ht6560a;
module_param(ht6560a, int, 0);
MODULE_PARM_DESC(ht6560a, "HT 6560A on primary 1, second 2, both 3");
static int ht6560b;
module_param(ht6560b, int, 0);
MODULE_PARM_DESC(ht6560b, "HT 6560B on primary 1, secondary 2, both 3");
static int opti82c611a;
module_param(opti82c611a, int, 0);
MODULE_PARM_DESC(opti82c611a,
"Opti 82c611A on primary 1, secondary 2, both 3");
static int opti82c46x;
module_param(opti82c46x, int, 0);
MODULE_PARM_DESC(opti82c46x,
"Opti 82c465MV on primary 1, secondary 2, both 3");
#ifdef CONFIG_PATA_QDI_MODULE
static int qdi = 1;
#else
static int qdi;
#endif
module_param(qdi, int, 0);
MODULE_PARM_DESC(qdi, "Set to probe QDI controllers");
#ifdef CONFIG_PATA_WINBOND_VLB_MODULE
static int winbond = 1;
#else
static int winbond;
#endif
module_param(winbond, int, 0);
MODULE_PARM_DESC(winbond,
"Set to probe Winbond controllers, "
"give I/O port if non standard");
enum controller {
BIOS = 0,
@ -117,30 +176,6 @@ static struct ata_host *legacy_host[NR_HOST];
static int nr_legacy_host;
static int probe_all; /* Set to check all ISA port ranges */
static int ht6560a; /* HT 6560A on primary 1, second 2, both 3 */
static int ht6560b; /* HT 6560A on primary 1, second 2, both 3 */
static int opti82c611a; /* Opti82c611A on primary 1, sec 2, both 3 */
static int opti82c46x; /* Opti 82c465MV present(pri/sec autodetect) */
static int autospeed; /* Chip present which snoops speed changes */
static int pio_mask = ATA_PIO4; /* PIO range for autospeed devices */
static int iordy_mask = 0xFFFFFFFF; /* Use iordy if available */
/* Set to probe QDI controllers */
#ifdef CONFIG_PATA_QDI_MODULE
static int qdi = 1;
#else
static int qdi;
#endif
#ifdef CONFIG_PATA_WINBOND_VLB_MODULE
static int winbond = 1; /* Set to probe Winbond controllers,
give I/O port if non standard */
#else
static int winbond; /* Set to probe Winbond controllers,
give I/O port if non standard */
#endif
/**
* legacy_probe_add - Add interface to probe list
* @port: Controller port
@ -168,6 +203,8 @@ static int legacy_probe_add(unsigned long port, unsigned int irq,
free = lp;
/* Matching port, or the correct slot for ordering */
if (lp->port == port || legacy_port[i] == port) {
if (!(probe_mask & 1 << i))
return -1;
free = lp;
break;
}
@ -588,7 +625,7 @@ static void opti82c46x_set_piomode(struct ata_port *ap, struct ata_device *adev)
}
/**
* opt82c465mv_qc_issue - command issue
* opti82c46x_qc_issue - command issue
* @qc: command pending
*
* Called when the libata layer is about to issue a command. We wrap
@ -923,7 +960,7 @@ static __init int probe_chip_type(struct legacy_probe *probe)
/**
* legacy_init_one - attach a legacy interface
* @pl: probe record
* @probe: probe record
*
* Register an ISA bus IDE interface. Such interfaces are PIO and we
* assume do not support IRQ sharing.
@ -1009,8 +1046,8 @@ fail:
/**
* legacy_check_special_cases - ATA special cases
* @p: PCI device to check
* @master: set this if we find an ATA master
* @master: set this if we find an ATA secondary
* @primary: set this if we find an ATA master
* @secondary: set this if we find an ATA secondary
*
* A small number of vendors implemented early PCI ATA interfaces
* on bridge logic without the ATA interface being PCI visible.
@ -1250,16 +1287,5 @@ MODULE_VERSION(DRV_VERSION);
MODULE_ALIAS("pata_qdi");
MODULE_ALIAS("pata_winbond");
module_param(probe_all, int, 0);
module_param(autospeed, int, 0);
module_param(ht6560a, int, 0);
module_param(ht6560b, int, 0);
module_param(opti82c611a, int, 0);
module_param(opti82c46x, int, 0);
module_param(qdi, int, 0);
module_param(winbond, int, 0);
module_param(pio_mask, int, 0);
module_param(iordy_mask, int, 0);
module_init(legacy_init);
module_exit(legacy_exit);

2
drivers/ata/pata_marvell.c
View File

@ -110,7 +110,7 @@ static struct ata_port_operations marvell_ops = {
/**
* marvell_init_one - Register Marvell ATA PCI device with kernel services
* @pdev: PCI device to register
* @ent: Entry in marvell_pci_tbl matching with @pdev
* @id: PCI device ID
*
* Called from kernel PCI layer.
*

4
drivers/ata/pata_ns87415.c
View File

@ -113,7 +113,7 @@ static void ns87415_set_piomode(struct ata_port *ap, struct ata_device *adev)
* ns87415_bmdma_setup - Set up DMA
* @qc: Command block
*
* Set up for bus masterng DMA. We have to do this ourselves
* Set up for bus mastering DMA. We have to do this ourselves
* rather than use the helper due to a chip erratum
*/
@ -174,7 +174,7 @@ static void ns87415_bmdma_stop(struct ata_queued_cmd *qc)
* ns87415_irq_clear - Clear interrupt
* @ap: Channel to clear
*
* Erratum: Due to a chip bug regisers 02 and 0A bit 1 and 2 (the
* Erratum: Due to a chip bug registers 02 and 0A bit 1 and 2 (the
* error bits) are reset by writing to register 00 or 08.
*/

2
drivers/ata/pata_opti.c
View File

@ -69,7 +69,7 @@ static int opti_pre_reset(struct ata_link *link, unsigned long deadline)
/**
* opti_write_reg - control register setup
* @ap: ATA port
* @value: value
* @val: value
* @reg: control register number
*
* The Opti uses magic 'trapdoor' register accesses to do configuration

5
drivers/ata/pata_optidma.c
View File

@ -287,7 +287,7 @@ static void optiplus_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
}
/**
* optidma_make_bits - PCI setup helper
* optidma_make_bits43 - PCI setup helper
* @adev: ATA device
*
* Turn the ATA device setup into PCI configuration bits
@ -309,6 +309,7 @@ static u8 optidma_make_bits43(struct ata_device *adev)
/**
* optidma_set_mode - mode setup
* @link: link to set up
* @r_failed: out parameter for failed device
*
* Use the standard setup to tune the chipset and then finalise the
* configuration by writing the nibble of extra bits of data into
@ -354,7 +355,7 @@ static struct ata_port_operations optiplus_port_ops = {
/**
* optiplus_with_udma - Look for UDMA capable setup
* @pdev; ATA controller
* @pdev: ATA controller
*/
static int optiplus_with_udma(struct pci_dev *pdev)

10
drivers/ata/pata_pdc2027x.c
View File

@ -196,7 +196,7 @@ static inline void __iomem *dev_mmio(struct ata_port *ap, struct ata_device *ade
}
/**
* pdc2027x_pata_cable_detect - Probe host controller cable detect info
* pdc2027x_cable_detect - Probe host controller cable detect info
* @ap: Port for which cable detect info is desired
*
* Read 80c cable indicator from Promise extended register.
@ -251,7 +251,7 @@ static int pdc2027x_prereset(struct ata_link *link, unsigned long deadline)
}
/**
* pdc2720x_mode_filter - mode selection filter
* pdc2027x_mode_filter - mode selection filter
* @adev: ATA device
* @mask: list of modes proposed
*
@ -503,11 +503,11 @@ retry:
}
/**
* adjust_pll - Adjust the PLL input clock in Hz.
* pdc_adjust_pll - Adjust the PLL input clock in Hz.
*
* @pdc_controller: controller specific information
* @host: target ATA host
* @pll_clock: The input of PLL in HZ
* @board_idx: board identifier
*/
static void pdc_adjust_pll(struct ata_host *host, long pll_clock, unsigned int board_idx)
{
@ -590,7 +590,7 @@ static void pdc_adjust_pll(struct ata_host *host, long pll_clock, unsigned int b
}
/**
* detect_pll_input_clock - Detect the PLL input clock in Hz.
* pdc_detect_pll_input_clock - Detect the PLL input clock in Hz.
* @host: target ATA host
* Ex. 16949000 on 33MHz PCI bus for pdc20275.
* Half of the PCI clock.

4
drivers/ata/pata_pdc202xx_old.c
View File

@ -115,7 +115,7 @@ static void pdc202xx_set_piomode(struct ata_port *ap, struct ata_device *adev)
}
/**
* pdc202xx_configure_dmamode - set DMA mode in chip
* pdc202xx_set_dmamode - set DMA mode in chip
* @ap: ATA interface
* @adev: ATA device
*
@ -214,7 +214,7 @@ static void pdc2026x_bmdma_start(struct ata_queued_cmd *qc)
}
/**
* pdc2026x_bmdma_end - DMA engine stop
* pdc2026x_bmdma_stop - DMA engine stop
* @qc: ATA command
*
* After a DMA completes we need to put the clock back to 33MHz for

2
drivers/ata/pata_piccolo.c
View File

@ -74,7 +74,7 @@ static struct ata_port_operations tosh_port_ops = {
};
/**
* ata_tosh_init - attach generic IDE
* ata_tosh_init_one - attach generic IDE
* @dev: PCI device found
* @id: match entry
*

4
drivers/ata/pata_platform.c
View File

@ -24,6 +24,8 @@
#define DRV_VERSION "1.2"
static int pio_mask = 1;
module_param(pio_mask, int, 0);
MODULE_PARM_DESC(pio_mask, "PIO modes supported, mode 0 only by default");
/*
* Provide our own set_mode() as we don't want to change anything that has
@ -233,8 +235,6 @@ static struct platform_driver pata_platform_driver = {
module_platform_driver(pata_platform_driver);
module_param(pio_mask, int, 0);
MODULE_AUTHOR("Paul Mundt");
MODULE_DESCRIPTION("low-level driver for platform device ATA");
MODULE_LICENSE("GPL");

2
drivers/ata/pata_sil680.c
View File

@ -57,6 +57,7 @@ static unsigned long sil680_selreg(struct ata_port *ap, int r)
/**
* sil680_seldev - return register base
* @ap: ATA interface
* @adev: ATA device
* @r: config offset
*
* Turn a config register offset into the right address in PCI space
@ -244,6 +245,7 @@ static struct ata_port_operations sil680_port_ops = {
/**
* sil680_init_chip - chip setup
* @pdev: PCI device
* @try_mmio: Indicates to caller whether MMIO should be attempted
*
* Perform all the chip setup which must be done both when the device
* is powered up on boot and when we resume in case we resumed from RAM.

2
drivers/ata/pata_sis.c
View File

@ -114,7 +114,6 @@ static int sis_port_base(struct ata_device *adev)
/**
* sis_133_cable_detect - check for 40/80 pin
* @ap: Port
* @deadline: deadline jiffies for the operation
*
* Perform cable detection for the later UDMA133 capable
* SiS chipset.
@ -521,6 +520,7 @@ static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev)
/**
* sis_133_mode_filter - mode selection filter
* @adev: ATA device
* @mask: received mask to manipulate and pass back
*
* Block UDMA6 on devices that do not support it.
*/

2
drivers/ata/pata_sl82c105.c
View File

@ -173,7 +173,7 @@ static void sl82c105_bmdma_start(struct ata_queued_cmd *qc)
}
/**
* sl82c105_bmdma_end - DMA engine stop
* sl82c105_bmdma_stop - DMA engine stop
* @qc: ATA command
*
* Reset the DMA engine each use as recommended by the errata

7
drivers/ata/pata_triflex.c
View File

@ -129,7 +129,7 @@ static void triflex_set_piomode(struct ata_port *ap, struct ata_device *adev)
}
/**
* triflex_dma_start - DMA start callback
* triflex_bmdma_start - DMA start callback
* @qc: Command in progress
*
* Usually drivers set the DMA timing at the point the set_dmamode call
@ -146,9 +146,8 @@ static void triflex_bmdma_start(struct ata_queued_cmd *qc)
}
/**
* triflex_dma_stop - DMA stop callback
* @ap: ATA interface
* @adev: ATA device
* triflex_bmdma_stop - DMA stop callback
* @qc: ATA command
*
* We loaded new timings in dma_start, as a result we need to restore
* the PIO timings in dma_stop so that the next command issue gets the

2
drivers/ata/pata_via.c
View File

@ -663,7 +663,7 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
#ifdef CONFIG_PM_SLEEP
/**
* via_reinit_one - reinit after resume
* @pdev; PCI device
* @pdev: PCI device
*
* Called when the VIA PATA device is resumed. We must then
* reconfigure the fifo and other setup we may have altered. In

10
drivers/ata/sata_dwc_460ex.c
View File

@ -543,6 +543,11 @@ static irqreturn_t sata_dwc_isr(int irq, void *dev_instance)
hsdev->sactive_issued |= qcmd_tag_to_mask(tag);
qc = ata_qc_from_tag(ap, tag);
if (unlikely(!qc)) {
dev_err(ap->dev, "failed to get qc");
handled = 1;
goto DONE;
}
/*
* Start FP DMA for NCQ command. At this point the tag is the
* active tag. It is the tag that matches the command about to
@ -658,6 +663,11 @@ DRVSTILLBUSY:
tag_mask &= (~0x00000001);
qc = ata_qc_from_tag(ap, tag);
if (unlikely(!qc)) {
dev_err(ap->dev, "failed to get qc");
handled = 1;
goto DONE;
}
/* To be picked up by completion functions */
qc->ap->link.active_tag = tag;

18
drivers/ata/sata_mv.c
View File

@ -1146,9 +1146,8 @@ static void mv_set_irq_coalescing(struct ata_host *host,
spin_unlock_irqrestore(&host->lock, flags);
}
/**
/*
* mv_start_edma - Enable eDMA engine
* @base: port base address
* @pp: port private data
*
* Verify the local cache of the eDMA state is accurate with a
@ -1519,7 +1518,7 @@ static void mv_60x1_errata_sata25(struct ata_port *ap, int want_ncq)
writel(new, hpriv->base + GPIO_PORT_CTL);
}
/**
/*
* mv_bmdma_enable - set a magic bit on GEN_IIE to allow bmdma
* @ap: Port being initialized
*
@ -1918,8 +1917,8 @@ static void mv_bmdma_start(struct ata_queued_cmd *qc)
}
/**
* mv_bmdma_stop - Stop BMDMA transfer
* @qc: queued command to stop DMA on.
* mv_bmdma_stop_ap - Stop BMDMA transfer
* @ap: port to stop
*
* Clears the ATA_DMA_START flag in the bmdma control register
*
@ -2221,6 +2220,7 @@ static u8 mv_sff_check_status(struct ata_port *ap)
/**
* mv_send_fis - Send a FIS, using the "Vendor-Unique FIS" register
* @ap: ATA port to send a FIS
* @fis: fis to be sent
* @nwords: number of 32-bit words in the fis
*/
@ -3249,7 +3249,7 @@ static void mv6_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio)
writel(tmp, mmio + GPIO_PORT_CTL);
}
/**
/*
* mv6_reset_hc - Perform the 6xxx global soft reset
* @mmio: base address of the HBA
*
@ -3530,7 +3530,7 @@ static void mv_soc_65n_phy_errata(struct mv_host_priv *hpriv,
writel(reg, port_mmio + PHY_MODE9_GEN1);
}
/**
/*
* soc_is_65 - check if the soc is 65 nano device
*
* Detect the type of the SoC, this is done by reading the PHYCFG_OFS
@ -4097,6 +4097,10 @@ static int mv_platform_probe(struct platform_device *pdev)
n_ports = mv_platform_data->n_ports;
irq = platform_get_irq(pdev, 0);
}
if (irq < 0)
return irq;
if (!irq)
return -EINVAL;
host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);