riscv: kprobes: implement the auipc instruction
This has been tested by probing a module that contains an auipc instruction. Signed-off-by: Chen Lifu <chenlifu@huawei.com> [Palmer: commit message] Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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@ -38,11 +38,11 @@ riscv_probe_decode_insn(probe_opcode_t *addr, struct arch_probe_insn *api)
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RISCV_INSN_REJECTED(c_ebreak, insn);
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#endif
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RISCV_INSN_REJECTED(auipc, insn);
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RISCV_INSN_REJECTED(branch, insn);
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RISCV_INSN_SET_SIMULATE(jal, insn);
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RISCV_INSN_SET_SIMULATE(jalr, insn);
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RISCV_INSN_SET_SIMULATE(auipc, insn);
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return INSN_GOOD;
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}
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@ -83,3 +83,37 @@ bool __kprobes simulate_jalr(u32 opcode, unsigned long addr, struct pt_regs *reg
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return ret;
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}
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#define auipc_rd_idx(opcode) \
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((opcode >> 7) & 0x1f)
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#define auipc_imm(opcode) \
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((((opcode) >> 12) & 0xfffff) << 12)
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#if __riscv_xlen == 64
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#define auipc_offset(opcode) sign_extend64(auipc_imm(opcode), 31)
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#elif __riscv_xlen == 32
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#define auipc_offset(opcode) auipc_imm(opcode)
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#else
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#error "Unexpected __riscv_xlen"
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#endif
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bool __kprobes simulate_auipc(u32 opcode, unsigned long addr, struct pt_regs *regs)
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{
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/*
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* auipc instruction:
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* 31 12 11 7 6 0
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* | imm[31:12] | rd | opcode |
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* 20 5 7
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*/
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u32 rd_idx = auipc_rd_idx(opcode);
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unsigned long rd_val = addr + auipc_offset(opcode);
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if (!rv_insn_reg_set_val(regs, rd_idx, rd_val))
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return false;
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instruction_pointer_set(regs, addr + 4);
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return true;
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}
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