From 3a87ff891290e1b9ef3f03396c22fd3b2f6eb955 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Thu, 12 Aug 2021 10:10:26 +0200 Subject: [PATCH 1/7] riscv: defconfig: enable BLK_DEV_NVME NVMe is a non-volatile storage media attached via PCIe. As NVMe has much higher throughput than other block devices like SATA it is a must have for RISC-V. Enable CONFIG_BLK_DEV_NVME. The HiFive Unmatched is a board providing M.2 slots for NVMe drives. Enable CONFIG_PCIE_FU740. Signed-off-by: Heinrich Schuchardt Reviewed-by: Anup Patel Signed-off-by: Palmer Dabbelt --- arch/riscv/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index bc68231a8fb7..a7d915a5932e 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -39,10 +39,12 @@ CONFIG_PCI=y CONFIG_PCIEPORTBUS=y CONFIG_PCI_HOST_GENERIC=y CONFIG_PCIE_XILINX=y +CONFIG_PCIE_FU740=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y CONFIG_BLK_DEV_LOOP=y CONFIG_VIRTIO_BLK=y +CONFIG_BLK_DEV_NVME=m CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SR=y CONFIG_SCSI_VIRTIO=y From efe1e08bca9a1fab2b0ad886be4fb5335dcbf29c Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Thu, 12 Aug 2021 10:10:27 +0200 Subject: [PATCH 2/7] riscv: defconfig: enable NLS_CODEPAGE_437, NLS_ISO8859_1 The EFI system partition uses the FAT file system. Many distributions add an entry in /etc/fstab for the ESP. We must ensure that mounting does not fail. The default code page for FAT is 437 (cf. CONFIG_FAT_DEFAULT_CODEPAGE). The default IO character set is "iso8859-1" (cf. CONFIG_NLS_ISO8859_1). So let's enable NLS_CODEPAGE_437 and NLS_ISO8859_1 in defconfig. Signed-off-by: Heinrich Schuchardt Signed-off-by: Palmer Dabbelt --- arch/riscv/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index a7d915a5932e..4ebc80315f01 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -110,6 +110,8 @@ CONFIG_NFS_V4_1=y CONFIG_NFS_V4_2=y CONFIG_ROOT_NFS=y CONFIG_9P_FS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=m CONFIG_CRYPTO_USER_API_HASH=y CONFIG_CRYPTO_DEV_VIRTIO=y CONFIG_PRINTK_TIME=y From d5935537c8256fc63c77d5f4914dfd6e3ef43241 Mon Sep 17 00:00:00 2001 From: Kefeng Wang Date: Thu, 12 Aug 2021 19:47:02 +0800 Subject: [PATCH 3/7] riscv: Improve stack randomisation on RV64 This enlarges the bits availiable for stack randomisation on RV64 from the default of 8MiB to 1GiB, to match arm64 and x86. Also, update the documentation to reflect our support for stack randomisation. Signed-off-by: Kefeng Wang [Palmer: commit text] Signed-off-by: Palmer Dabbelt --- Documentation/features/vm/ELF-ASLR/arch-support.txt | 2 +- arch/riscv/include/asm/elf.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/features/vm/ELF-ASLR/arch-support.txt b/Documentation/features/vm/ELF-ASLR/arch-support.txt index 99cb6d7f5005..2949c99fbb2f 100644 --- a/Documentation/features/vm/ELF-ASLR/arch-support.txt +++ b/Documentation/features/vm/ELF-ASLR/arch-support.txt @@ -22,7 +22,7 @@ | openrisc: | TODO | | parisc: | ok | | powerpc: | ok | - | riscv: | TODO | + | riscv: | ok | | s390: | ok | | sh: | TODO | | sparc: | TODO | diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h index f4b490cd0e5d..f53c40026c7a 100644 --- a/arch/riscv/include/asm/elf.h +++ b/arch/riscv/include/asm/elf.h @@ -42,6 +42,9 @@ */ #define ELF_ET_DYN_BASE ((TASK_SIZE / 3) * 2) +#ifdef CONFIG_64BIT +#define STACK_RND_MASK (0x3ffff >> (PAGE_SHIFT - 12)) +#endif /* * This yields a mask that user programs can use to figure out what * instruction set this CPU supports. This could be done in user space, From 399c1ec8467c563ae9db4c19a40a9d5e728b1e72 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 29 Jul 2021 23:21:47 +0900 Subject: [PATCH 4/7] riscv: move the (z)install rules to arch/riscv/Makefile Currently, the (z)install targets in arch/riscv/Makefile descend into arch/riscv/boot/Makefile to invoke the shell script, but there is no good reason to do so. arch/riscv/Makefile can run the shell script directly. Signed-off-by: Masahiro Yamada Signed-off-by: Palmer Dabbelt --- arch/riscv/Makefile | 7 +++++-- arch/riscv/boot/Makefile | 8 -------- 2 files changed, 5 insertions(+), 10 deletions(-) diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 01906a90c501..0eb4568fbd29 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -132,8 +132,11 @@ $(BOOT_TARGETS): vmlinux Image.%: Image $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ -zinstall install: - $(Q)$(MAKE) $(build)=$(boot) $@ +install: install-image = Image +zinstall: install-image = Image.gz +install zinstall: + $(CONFIG_SHELL) $(srctree)/$(boot)/install.sh $(KERNELRELEASE) \ + $(boot)/$(install-image) System.map "$(INSTALL_PATH)" archclean: $(Q)$(MAKE) $(clean)=$(boot) diff --git a/arch/riscv/boot/Makefile b/arch/riscv/boot/Makefile index 6bf299f70c27..becd0621071c 100644 --- a/arch/riscv/boot/Makefile +++ b/arch/riscv/boot/Makefile @@ -58,11 +58,3 @@ $(obj)/Image.lzo: $(obj)/Image FORCE $(obj)/loader.bin: $(obj)/loader FORCE $(call if_changed,objcopy) - -install: - $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \ - $(obj)/Image System.map "$(INSTALL_PATH)" - -zinstall: - $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \ - $(obj)/Image.gz System.map "$(INSTALL_PATH)" From cbba17870881cd17bca24673ccb72859431da5bd Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 26 Aug 2021 15:19:39 +0200 Subject: [PATCH 5/7] riscv: dts: microchip: mpfs-icicle: Fix serial console Currently, nothing is output on the serial console, unless "console=ttyS0,115200n8" or "earlycon" are appended to the kernel command line. Enable automatic console selection using chosen/stdout-path by adding a proper alias, and configure the expected serial rate. While at it, add aliases for the other three serial ports, which are provided on the same micro-USB connector as the first one. Fixes: 0fa6107eca4186ad ("RISC-V: Initial DTS for Microchip ICICLE board") Signed-off-by: Geert Uytterhoeven Reviewed-by: Bin Meng Reviewed-by: Conor Dooley Signed-off-by: Palmer Dabbelt --- arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts index baea7d204639..b254c60589a1 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts @@ -16,10 +16,14 @@ aliases { ethernet0 = &emac1; + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; }; chosen { - stdout-path = &serial0; + stdout-path = "serial0:115200n8"; }; cpus { From 54fed35fd3939398be292e4090b0b1c5ff2238b4 Mon Sep 17 00:00:00 2001 From: Jisheng Zhang Date: Thu, 26 Aug 2021 22:10:29 +0800 Subject: [PATCH 6/7] riscv: Enable BUILDTIME_TABLE_SORT Enable BUILDTIME_TABLE_SORT to sort the exception table at build time rather than during boot. Signed-off-by: Jisheng Zhang Signed-off-by: Palmer Dabbelt --- arch/riscv/Kconfig | 1 + scripts/sorttable.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index baf60fc350a4..c1abbc876e5b 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -41,6 +41,7 @@ config RISCV select ARCH_WANT_FRAME_POINTERS select ARCH_WANT_HUGE_PMD_SHARE if 64BIT select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU + select BUILDTIME_TABLE_SORT if MMU select CLONE_BACKWARDS select CLINT_TIMER if !MMU select COMMON_CLK diff --git a/scripts/sorttable.c b/scripts/sorttable.c index 0ef3abfc4a51..f355869c65cd 100644 --- a/scripts/sorttable.c +++ b/scripts/sorttable.c @@ -349,6 +349,7 @@ static int do_file(char const *const fname, void *addr) case EM_ARM: case EM_MICROBLAZE: case EM_MIPS: + case EM_RISCV: case EM_XTENSA: break; default: From 6f55ab36bef505b449723300a5a445ddc76a94d7 Mon Sep 17 00:00:00 2001 From: Jisheng Zhang Date: Thu, 26 Aug 2021 22:11:18 +0800 Subject: [PATCH 7/7] riscv: Move EXCEPTION_TABLE to RO_DATA segment _ex_table section is read-only, so move it to RO_DATA. Signed-off-by: Jisheng Zhang Signed-off-by: Palmer Dabbelt --- arch/riscv/kernel/vmlinux-xip.lds.S | 1 - arch/riscv/kernel/vmlinux.lds.S | 4 ++-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kernel/vmlinux-xip.lds.S b/arch/riscv/kernel/vmlinux-xip.lds.S index af776555ded9..9c9f35091ef0 100644 --- a/arch/riscv/kernel/vmlinux-xip.lds.S +++ b/arch/riscv/kernel/vmlinux-xip.lds.S @@ -121,7 +121,6 @@ SECTIONS } BSS_SECTION(PAGE_SIZE, PAGE_SIZE, 0) - EXCEPTION_TABLE(0x10) .rel.dyn : AT(ADDR(.rel.dyn) - LOAD_OFFSET) { *(.rel.dyn*) diff --git a/arch/riscv/kernel/vmlinux.lds.S b/arch/riscv/kernel/vmlinux.lds.S index 502d0826ecb1..5104f3a871e3 100644 --- a/arch/riscv/kernel/vmlinux.lds.S +++ b/arch/riscv/kernel/vmlinux.lds.S @@ -4,6 +4,8 @@ * Copyright (C) 2017 SiFive */ +#define RO_EXCEPTION_TABLE_ALIGN 16 + #ifdef CONFIG_XIP_KERNEL #include "vmlinux-xip.lds.S" #else @@ -112,8 +114,6 @@ SECTIONS *(.srodata*) } - EXCEPTION_TABLE(0x10) - . = ALIGN(SECTION_ALIGN); _data = .;