arm64: assembler: Align phys_to_pte with pte_to_phys
pte_to_phys lives in assembler.h and takes its destination register as the first argument. Move phys_to_pte out of head.S to sit with its counterpart and rejig it to follow the same calling convention. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -523,6 +523,19 @@ alternative_endif
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#endif
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.endm
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.macro phys_to_pte, pte, phys
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#ifdef CONFIG_ARM64_PA_BITS_52
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/*
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* We assume \phys is 64K aligned and this is guaranteed by only
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* supporting this configuration with 64K pages.
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*/
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orr \pte, \phys, \phys, lsr #36
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and \pte, \pte, #PTE_ADDR_MASK
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#else
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mov \pte, \phys
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#endif
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.endm
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.macro pte_to_phys, phys, pte
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#ifdef CONFIG_ARM64_PA_BITS_52
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ubfiz \phys, \pte, #(48 - 16 - 12), #16
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@ -147,26 +147,6 @@ preserve_boot_args:
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b __inval_dcache_area // tail call
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ENDPROC(preserve_boot_args)
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/*
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* Macro to arrange a physical address in a page table entry, taking care of
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* 52-bit addresses.
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*
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* Preserves: phys
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* Returns: pte
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*/
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.macro phys_to_pte, phys, pte
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#ifdef CONFIG_ARM64_PA_BITS_52
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/*
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* We assume \phys is 64K aligned and this is guaranteed by only
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* supporting this configuration with 64K pages.
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*/
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orr \pte, \phys, \phys, lsr #36
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and \pte, \pte, #PTE_ADDR_MASK
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#else
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mov \pte, \phys
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#endif
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.endm
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/*
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* Macro to create a table entry to the next page.
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*
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@ -181,7 +161,7 @@ ENDPROC(preserve_boot_args)
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*/
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.macro create_table_entry, tbl, virt, shift, ptrs, tmp1, tmp2
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add \tmp1, \tbl, #PAGE_SIZE
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phys_to_pte \tmp1, \tmp2
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phys_to_pte \tmp2, \tmp1
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orr \tmp2, \tmp2, #PMD_TYPE_TABLE // address of next table and entry type
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lsr \tmp1, \virt, #\shift
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sub \ptrs, \ptrs, #1
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@ -207,7 +187,7 @@ ENDPROC(preserve_boot_args)
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* Returns: rtbl
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*/
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.macro populate_entries, tbl, rtbl, index, eindex, flags, inc, tmp1
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.Lpe\@: phys_to_pte \rtbl, \tmp1
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.Lpe\@: phys_to_pte \tmp1, \rtbl
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orr \tmp1, \tmp1, \flags // tmp1 = table entry
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str \tmp1, [\tbl, \index, lsl #3]
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add \rtbl, \rtbl, \inc // rtbl = pa next level
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